| 1 |
27 |
unneback |
#ifndef CYGONCE_HAL_HAL_IO_H
|
| 2 |
|
|
#define CYGONCE_HAL_HAL_IO_H
|
| 3 |
|
|
|
| 4 |
|
|
//=============================================================================
|
| 5 |
|
|
//
|
| 6 |
|
|
// hal_io.h
|
| 7 |
|
|
//
|
| 8 |
|
|
// HAL device IO register support.
|
| 9 |
|
|
//
|
| 10 |
|
|
//=============================================================================
|
| 11 |
|
|
//####ECOSGPLCOPYRIGHTBEGIN####
|
| 12 |
|
|
// -------------------------------------------
|
| 13 |
|
|
// This file is part of eCos, the Embedded Configurable Operating System.
|
| 14 |
|
|
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
|
| 15 |
|
|
//
|
| 16 |
|
|
// eCos is free software; you can redistribute it and/or modify it under
|
| 17 |
|
|
// the terms of the GNU General Public License as published by the Free
|
| 18 |
|
|
// Software Foundation; either version 2 or (at your option) any later version.
|
| 19 |
|
|
//
|
| 20 |
|
|
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
|
| 21 |
|
|
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
| 22 |
|
|
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
| 23 |
|
|
// for more details.
|
| 24 |
|
|
//
|
| 25 |
|
|
// You should have received a copy of the GNU General Public License along
|
| 26 |
|
|
// with eCos; if not, write to the Free Software Foundation, Inc.,
|
| 27 |
|
|
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
|
| 28 |
|
|
//
|
| 29 |
|
|
// As a special exception, if other files instantiate templates or use macros
|
| 30 |
|
|
// or inline functions from this file, or you compile this file and link it
|
| 31 |
|
|
// with other works to produce a work based on this file, this file does not
|
| 32 |
|
|
// by itself cause the resulting work to be covered by the GNU General Public
|
| 33 |
|
|
// License. However the source code for this file must still be made available
|
| 34 |
|
|
// in accordance with section (3) of the GNU General Public License.
|
| 35 |
|
|
//
|
| 36 |
|
|
// This exception does not invalidate any other reasons why a work based on
|
| 37 |
|
|
// this file might be covered by the GNU General Public License.
|
| 38 |
|
|
//
|
| 39 |
|
|
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
|
| 40 |
|
|
// at http://sources.redhat.com/ecos/ecos-license/
|
| 41 |
|
|
// -------------------------------------------
|
| 42 |
|
|
//####ECOSGPLCOPYRIGHTEND####
|
| 43 |
|
|
//=============================================================================
|
| 44 |
|
|
|
| 45 |
|
|
#include <cyg/infra/cyg_type.h>
|
| 46 |
|
|
|
| 47 |
|
|
//-----------------------------------------------------------------------------
|
| 48 |
|
|
// IO Register address.
|
| 49 |
|
|
// This type is for recording the address of an IO register.
|
| 50 |
|
|
|
| 51 |
|
|
typedef volatile CYG_ADDRWORD HAL_IO_REGISTER;
|
| 52 |
|
|
|
| 53 |
|
|
//-----------------------------------------------------------------------------
|
| 54 |
|
|
// BYTE Register access.
|
| 55 |
|
|
// Individual and vectorized access to 8 bit registers.
|
| 56 |
|
|
|
| 57 |
|
|
#define HAL_READ_UINT8( _register_, _value_ ) \
|
| 58 |
|
|
CYG_MACRO_START \
|
| 59 |
|
|
((_value_) = *((volatile CYG_BYTE *)(_register_))); \
|
| 60 |
|
|
CYG_MACRO_END
|
| 61 |
|
|
|
| 62 |
|
|
#define HAL_WRITE_UINT8( _register_, _value_ ) \
|
| 63 |
|
|
CYG_MACRO_START \
|
| 64 |
|
|
(*((volatile CYG_BYTE *)(_register_)) = (_value_)); \
|
| 65 |
|
|
CYG_MACRO_END
|
| 66 |
|
|
|
| 67 |
|
|
#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
|
| 68 |
|
|
CYG_MACRO_START \
|
| 69 |
|
|
cyg_count32 _i_,_j_; \
|
| 70 |
|
|
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
|
| 71 |
|
|
(_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \
|
| 72 |
|
|
} \
|
| 73 |
|
|
CYG_MACRO_END
|
| 74 |
|
|
|
| 75 |
|
|
#define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
|
| 76 |
|
|
CYG_MACRO_START \
|
| 77 |
|
|
cyg_count32 _i_,_j_; \
|
| 78 |
|
|
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
|
| 79 |
|
|
((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \
|
| 80 |
|
|
} \
|
| 81 |
|
|
CYG_MACRO_END
|
| 82 |
|
|
|
| 83 |
|
|
|
| 84 |
|
|
//-----------------------------------------------------------------------------
|
| 85 |
|
|
// 16 bit access.
|
| 86 |
|
|
// Individual and vectorized access to 16 bit registers.
|
| 87 |
|
|
|
| 88 |
|
|
#define HAL_READ_UINT16( _register_, _value_ ) \
|
| 89 |
|
|
CYG_MACRO_START \
|
| 90 |
|
|
((_value_) = *((volatile CYG_WORD16 *)(_register_))); \
|
| 91 |
|
|
CYG_MACRO_END
|
| 92 |
|
|
|
| 93 |
|
|
#define HAL_WRITE_UINT16( _register_, _value_ ) \
|
| 94 |
|
|
CYG_MACRO_START \
|
| 95 |
|
|
(*((volatile CYG_WORD16 *)(_register_)) = (_value_)); \
|
| 96 |
|
|
CYG_MACRO_END
|
| 97 |
|
|
|
| 98 |
|
|
#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
|
| 99 |
|
|
CYG_MACRO_START \
|
| 100 |
|
|
cyg_count32 _i_,_j_; \
|
| 101 |
|
|
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
|
| 102 |
|
|
(_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \
|
| 103 |
|
|
} \
|
| 104 |
|
|
CYG_MACRO_END
|
| 105 |
|
|
|
| 106 |
|
|
#define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
|
| 107 |
|
|
CYG_MACRO_START \
|
| 108 |
|
|
cyg_count32 _i_,_j_; \
|
| 109 |
|
|
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
|
| 110 |
|
|
((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \
|
| 111 |
|
|
} \
|
| 112 |
|
|
CYG_MACRO_END
|
| 113 |
|
|
|
| 114 |
|
|
//-----------------------------------------------------------------------------
|
| 115 |
|
|
// 32 bit access.
|
| 116 |
|
|
// Individual and vectorized access to 32 bit registers.
|
| 117 |
|
|
|
| 118 |
|
|
#define HAL_READ_UINT32( _register_, _value_ ) \
|
| 119 |
|
|
CYG_MACRO_START \
|
| 120 |
|
|
((_value_) = *((volatile CYG_WORD32 *)(_register_))); \
|
| 121 |
|
|
CYG_MACRO_END
|
| 122 |
|
|
|
| 123 |
|
|
#define HAL_WRITE_UINT32( _register_, _value_ ) \
|
| 124 |
|
|
CYG_MACRO_START \
|
| 125 |
|
|
(*((volatile CYG_WORD32 *)(_register_)) = (_value_)); \
|
| 126 |
|
|
CYG_MACRO_END
|
| 127 |
|
|
|
| 128 |
|
|
#define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
|
| 129 |
|
|
CYG_MACRO_START \
|
| 130 |
|
|
cyg_count32 _i_,_j_; \
|
| 131 |
|
|
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
|
| 132 |
|
|
(_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \
|
| 133 |
|
|
} \
|
| 134 |
|
|
CYG_MACRO_END
|
| 135 |
|
|
|
| 136 |
|
|
#define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
|
| 137 |
|
|
CYG_MACRO_START \
|
| 138 |
|
|
cyg_count32 _i_,_j_; \
|
| 139 |
|
|
for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) { \
|
| 140 |
|
|
((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \
|
| 141 |
|
|
} \
|
| 142 |
|
|
CYG_MACRO_END
|
| 143 |
|
|
|
| 144 |
|
|
//-----------------------------------------------------------------------------
|
| 145 |
|
|
#endif // ifndef CYGONCE_HAL_HAL_IO_H
|
| 146 |
|
|
// End of hal_io.h
|
