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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [m68k/] [mcf52xx/] [mcf5272/] [mcf5272c3/] [plf/] [v2_0/] [src/] [hal_diag.c] - Blame information for rev 293

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//=============================================================================
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//
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//      hal_diag.c
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//
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//      HAL diagnostic output code
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//
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//=============================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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#include <pkgconf/hal.h>
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#include <cyg/hal/hal_diag.h>           // our header.
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#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
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#include <cyg/hal/hal_stub.h>           // hal_output_gdb_string
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#endif
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#include <cyg/infra/cyg_type.h>         // base types, externC
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#include <cyg/hal/hal_io.h>             // IO macros
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#include <cyg/hal/hal_intr.h>           // Interrupt macros
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#include <cyg/hal/hal_arch.h>
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#define CYG_KERNEL_DIAG_SERIAL
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//-----------------------------------------------------------------------------
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// Serial diag functions.
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#ifdef CYG_KERNEL_DIAG_SERIAL
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// Include the serial driver.
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void hal_diag_init(void)
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{
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    CYG_WORD16 clk_div;
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    /*   We must first enable the UART output pins from the general-purpose */
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    /* I/O module.                                                          */
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    /*   Enable the UART0 pins in the port B control register.              */
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    MCF5272_SIM->gpio.pbcnt = ((MCF5272_SIM->gpio.pbcnt &
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                                ~(MCF5272_GPIO_PBCNT_URT0_MSK)) |
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                               (MCF5272_GPIO_PBCNT_URT0_EN));
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    /*   Before we do anything else,  make sure  we have  enabled CTS  (our */
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    /* RTS) in case the  device  we  are  using  relies  on  hardware  flow */
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    /* control.  Note that this step is  our only attempt at hardware  flow */
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    /* control.                                                             */
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    MCF5272_SIM->uart[0].uop1 = 1;
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        /* Initialize UART0 */
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        /* Reset Transmitter */
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    MCF5272_SIM->uart[0].ucr = MCF5272_UART_UCR_RTX;
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        /* Reset Receiver */
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    MCF5272_SIM->uart[0].ucr = MCF5272_UART_UCR_RRX;
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        /* Reset Mode Register */
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    MCF5272_SIM->uart[0].ucr = MCF5272_UART_UCR_RMR;
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    MCF5272_SIM->uart[0].ucr = MCF5272_UART_UCR_RES;
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    MCF5272_SIM->uart[0].ucr = MCF5272_UART_UCR_RBC;
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    /*   Mode register 1 sets the UART to  8 data bits with no parity,  and */
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    /* mode register 2  forces 1 stop  bit.  Reading or  write to the  mode */
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    /* register switches it from umr1 to umr2.  To set it to umr1, we  must */
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    /* write a reset mode register command to the command register.         */
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    MCF5272_SIM->uart[0].umr = MCF5272_UART_UMR_8BNP;
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    MCF5272_SIM->uart[0].umr = MCF5272_UART_UMR_1S;
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    /*   Select a prescaled (by 1/32) CLKIN for the clock source.           */
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    MCF5272_SIM->uart[0].usr_ucsr = MCF5272_UART_UCSR_CLKIN;
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    /*   Calculate baud settings                                            */
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    clk_div = (CYG_WORD16)
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              ((CYGHWR_HAL_SYSTEM_CLOCK_MHZ*1000000)/
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               (CYGHWR_HAL_M68K_MCF52xx_MCF5272_MCF5272C3_DIAG_BAUD * 32));
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    MCF5272_SIM->uart[0].udu = clk_div >> 8;
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    MCF5272_SIM->uart[0].udl = clk_div & 0x00ff;
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    /*   Enable the transmitter and receiver.                               */
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    MCF5272_SIM->uart[0].ucr = MCF5272_UART_UCR_TXRXEN;
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}
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void hal_diag_write_char(cyg_int8 ch)
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{
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    /* Loop until the transmit data holding register is empty. */
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    while (!(MCF5272_SIM->uart[0].usr_ucsr & MCF5272_UART_USR_TXRDY));
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    /* Write the character to the transmit status register. */
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    MCF5272_SIM->uart[0].urb_utb = ch;
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    /*   Loop until the transmit data  FIFO  and  the  shift  register  are */
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    /* empty.                                                               */
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    while ((MCF5272_SIM->uart[0].utf & MCF5272_UART_UTF_TXB) ||
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           (!(MCF5272_SIM->uart[0].usr_ucsr & MCF5272_UART_USR_TXEMP)));
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}
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cyg_int8 hal_diag_read_char(void)
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{
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    return 0;
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}
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#endif // ifdef CYG_KERNEL_DIAG_SERIAL
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//-----------------------------------------------------------------------------
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// End of hal_diag.c
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