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#ifndef CYGONCE_HAL_MIPS_INC
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#define CYGONCE_HAL_MIPS_INC
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##=============================================================================
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##
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## mips.inc
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##
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## MIPS assembler header file
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##
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##=============================================================================
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#####ECOSGPLCOPYRIGHTBEGIN####
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## -------------------------------------------
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## This file is part of eCos, the Embedded Configurable Operating System.
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## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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##
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## eCos is free software; you can redistribute it and/or modify it under
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## the terms of the GNU General Public License as published by the Free
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## Software Foundation; either version 2 or (at your option) any later version.
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##
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## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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## WARRANTY; without even the implied warranty of MERCHANTABILITY or
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## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License along
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## with eCos; if not, write to the Free Software Foundation, Inc.,
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## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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##
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## As a special exception, if other files instantiate templates or use macros
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## or inline functions from this file, or you compile this file and link it
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## with other works to produce a work based on this file, this file does not
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## by itself cause the resulting work to be covered by the GNU General Public
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## License. However the source code for this file must still be made available
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## in accordance with section (3) of the GNU General Public License.
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##
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## This exception does not invalidate any other reasons why a work based on
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## this file might be covered by the GNU General Public License.
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##
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## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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## at http://sources.redhat.com/ecos/ecos-license/
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## -------------------------------------------
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#####ECOSGPLCOPYRIGHTEND####
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##=============================================================================
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#######DESCRIPTIONBEGIN####
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##
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## Author(s): nickg
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## Contributors: nickg
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## Date: 1997-10-16
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## Purpose: MIPS definitions.
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## Description: This file contains various definitions and macros that are
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## useful for writing assembly code for the MIPS CPU family.
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## Usage:
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## #include
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## ...
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##
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##
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######DESCRIPTIONEND####
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##
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##=============================================================================
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##-----------------------------------------------------------------------------
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## Standard MIPS register names:
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#define zero $0
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#define z0 $0
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#define v0 $2
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#define v1 $3
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#define a0 $4
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#define a1 $5
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#define a2 $6
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#define a3 $7
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#define t0 $8
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#define t1 $9
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#define t2 $10
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#define t3 $11
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#define t4 $12
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#define t5 $13
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#define t6 $14
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#define t7 $15
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#define s0 $16
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#define s1 $17
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#define s2 $18
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#define s3 $19
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#define s4 $20
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#define s5 $21
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#define s6 $22
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#define s7 $23
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#define t8 $24
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#define t9 $25
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#define k0 $26 /* kernel private register 0 */
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#define k1 $27 /* kernel private register 1 */
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#define gp $28 /* global data pointer */
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#define sp $29 /* stack-pointer */
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#define fp $30 /* frame-pointer */
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#define ra $31 /* return address */
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#define pc $pc /* pc, used on mips16 */
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#define f0 $f0
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#define f1 $f1
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#define f2 $f2
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#define f3 $f3
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#define f4 $f4
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#define f5 $f5
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#define f6 $f6
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#define f7 $f7
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#define f8 $f8
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#define f9 $f9
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#define f10 $f10
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#define f11 $f11
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#define f12 $f12
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#define f13 $f13
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#define f14 $f14
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#define f15 $f15
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#define f16 $f16
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#define f17 $f17
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#define f18 $f18
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#define f19 $f19
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#define f20 $f20
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#define f21 $f21
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#define f22 $f22
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#define f23 $f23
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#define f24 $f24
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#define f25 $f25
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#define f26 $f26
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#define f27 $f27
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#define f28 $f28
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#define f29 $f29
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#define f30 $f30
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#define f31 $f31
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// Coprocessor 0 registers
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#define index $0 // TLB entry index register
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#define random $1 // TLB random index register
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#define tlblo0 $2 // TLB even page entry register
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#define tlblo1 $3 // TLB odd page entry register
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#define config $3 // Configuration register (TX39 only)
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#define context $4 // TLB context register
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#define pagemask $5 // TLB page size mask
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#define wired $6 // TLB wired boundary
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#define cachectrl $7 // Cache control
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#define badvr $8 // Bad virtual address
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#define count $9 // Timer cycle count register
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#define tlbhi $10 // TLB virtual address match register
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#define compare $11 // Timer compare register
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#define status $12 // Status register
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#define cause $13 // Exception cause
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#define epc $14 // Exception pc value
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#define prid $15 // processor ID
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#define config0 $16 // Config register 0
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#define lladdr $17 // LLAdddr
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#define xcontext $20 // XContext register
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#define ecc $26 // Error Checking and Correcting
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#define cache_err $27 // Cache Error and Status
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#define taglo $28 // TagLo
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#define taghi $29 // TagHi
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#define error_epc $30 // Error exception pc value
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#------------------------------------------------------------------------------
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#define FUNC_START(name) \
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.type name,@function; \
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.set push ; \
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.globl name; \
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.ent name; \
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.set noreorder ; \
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name:
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#define FUNC_END(name) \
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name##_end: \
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.set pop; \
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.end name \
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#------------------------------------------------------------------------------
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#endif // ifndef CYGONCE_HAL_MIPS_INC
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# end of mips.inc
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