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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [mips/] [arch/] [v2_0/] [src/] [hal_misc.c] - Blame information for rev 174

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//==========================================================================
2
//
3
//      hal_misc.c
4
//
5
//      HAL miscellaneous functions
6
//
7
//==========================================================================
8
//####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under
14
// the terms of the GNU General Public License as published by the Free
15
// Software Foundation; either version 2 or (at your option) any later version.
16
//
17
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
20
// for more details.
21
//
22
// You should have received a copy of the GNU General Public License along
23
// with eCos; if not, write to the Free Software Foundation, Inc.,
24
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25
//
26
// As a special exception, if other files instantiate templates or use macros
27
// or inline functions from this file, or you compile this file and link it
28
// with other works to produce a work based on this file, this file does not
29
// by itself cause the resulting work to be covered by the GNU General Public
30
// License. However the source code for this file must still be made available
31
// in accordance with section (3) of the GNU General Public License.
32
//
33
// This exception does not invalidate any other reasons why a work based on
34
// this file might be covered by the GNU General Public License.
35
//
36
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37
// at http://sources.redhat.com/ecos/ecos-license/
38
// -------------------------------------------
39
//####ECOSGPLCOPYRIGHTEND####
40
//==========================================================================
41
//#####DESCRIPTIONBEGIN####
42
//
43
// Author(s):    nickg
44
// Contributors: nickg, jlarmour
45
// Date:         1999-01-21
46
// Purpose:      HAL miscellaneous functions
47
// Description:  This file contains miscellaneous functions provided by the
48
//               HAL.
49
//
50
//####DESCRIPTIONEND####
51
//
52
//========================================================================*/
53
 
54
#include <pkgconf/hal.h>
55
 
56
#include <cyg/infra/cyg_type.h>         // Base types
57
#include <cyg/infra/cyg_trac.h>         // tracing macros
58
#include <cyg/infra/cyg_ass.h>          // assertion macros
59
 
60
#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
61
#include <cyg/hal/hal_arch.h>           // architectural definitions
62
 
63
#include <cyg/hal/hal_intr.h>           // Interrupt handling
64
 
65
#include <cyg/hal/hal_cache.h>          // Cache handling
66
#include <cyg/hal/hal_if.h>             // hal_ctrlc_isr()
67
#include <cyg/hal/mips-regs.h>          // FPU cause register definitions
68
 
69
#include CYGHWR_MEMORY_LAYOUT_H
70
 
71
/*------------------------------------------------------------------------*/
72
/* If required, define a variable to store the clock period.              */
73
 
74
#ifdef CYGHWR_HAL_CLOCK_PERIOD_DEFINED
75
 
76
CYG_WORD32 cyg_hal_clock_period;
77
 
78
#endif
79
 
80
/*------------------------------------------------------------------------*/
81
/* First level C exception handler.                                       */
82
 
83
externC void __handle_exception (void);
84
 
85
externC HAL_SavedRegisters *_hal_registers;
86
 
87
externC void* volatile __mem_fault_handler;
88
 
89
externC cyg_uint8 cyg_hal_mips_process_fpe( HAL_SavedRegisters *regs );
90
 
91
externC cyg_uint32 cyg_hal_exception_handler(HAL_SavedRegisters *regs)
92
{
93
#if defined(CYGHWR_HAL_MIPS_FPU) || \
94
    (defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && defined(CYGPKG_HAL_EXCEPTIONS))
95
    int vec = regs->vector>>2;
96
#endif
97
 
98
#if defined(CYGHWR_HAL_MIPS_FPU)
99
    // Special handling of FPU exceptions
100
    if (CYGNUM_HAL_VECTOR_FPE == vec) {
101
 
102
#if defined(CYGSEM_HAL_MIPS_EMULATE_UNIMPLEMENTED_FPU_OPS)
103
        // We may be required to emulate certain unimplemented Floating Point
104
        // operations
105
 
106
        // cyg_hal_mips_process_fpe() returns non-zero if it could handle
107
        // the exception successfully. If so, we just return
108
 
109
        if ( cyg_hal_mips_process_fpe(regs) )
110
            return 0;
111
#endif
112
 
113
        // Find the cause of the FPU exception, clear the flag and use
114
        // the decoded vector number.
115
        {
116
            cyg_uint32 cause = regs->fcr31;
117
 
118
            if (cause & FCR31_CAUSE_I) {
119
                vec = CYGNUM_HAL_EXCEPTION_FPU_INEXACT;
120
                cause &= ~(FCR31_FLAGS_I | FCR31_CAUSE_I);
121
            } else if (cause & FCR31_CAUSE_U) {
122
                vec = CYGNUM_HAL_EXCEPTION_FPU_UNDERFLOW;
123
                cause &= ~(FCR31_FLAGS_U | FCR31_CAUSE_U);
124
            } else if (cause & FCR31_CAUSE_O) {
125
                vec = CYGNUM_HAL_EXCEPTION_FPU_OVERFLOW;
126
                cause &= ~(FCR31_FLAGS_O | FCR31_CAUSE_O);
127
            } else if (cause & FCR31_CAUSE_Z) {
128
                vec = CYGNUM_HAL_EXCEPTION_FPU_DIV_BY_ZERO;
129
                cause &= ~(FCR31_FLAGS_Z | FCR31_CAUSE_Z);
130
            } else if (cause & FCR31_CAUSE_V) {
131
                vec = CYGNUM_HAL_EXCEPTION_FPU_INVALID;
132
                cause &= ~(FCR31_FLAGS_V | FCR31_CAUSE_V);
133
            }
134
            regs->fcr31 = cause;
135
 
136
#if 1
137
            // Update the FPU status register with the new
138
            // setting. This is a workaround for the signal2 test
139
            // which does a longjump in the exception handler and thus
140
            // never gets around to executing the register restore
141
            // code.
142
            asm ("ctc1  %0,$31" : : "r" (cause));
143
#endif
144
        }
145
    }
146
#endif // CYGHWR_HAL_MIPS_FPU
147
 
148
 
149
#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
150
 
151
    // If we caught an exception inside the stubs, see if we were expecting it
152
    // and if so jump to the saved address
153
    if (__mem_fault_handler) {
154
        regs->pc = (CYG_HAL_MIPS_REG)(signed long)__mem_fault_handler;
155
        return 0; // Caught an exception inside stubs        
156
    }
157
 
158
    // Set the pointer to the registers of the current exception
159
    // context. At entry the GDB stub will expand the
160
    // HAL_SavedRegisters structure into a (bigger) register array.
161
    _hal_registers = regs;
162
    __handle_exception();
163
 
164
#elif defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && defined(CYGPKG_HAL_EXCEPTIONS)
165
 
166
    // We should decode the vector and pass a more appropriate
167
    // value as the second argument. For now we simply pass a
168
    // pointer to the saved registers. We should also divert
169
    // breakpoint and other debug vectors into the debug stubs.
170
 
171
    cyg_hal_deliver_exception( vec, (CYG_ADDRWORD)regs );
172
 
173
#else
174
 
175
    CYG_FAIL("Exception!!!");
176
 
177
#endif    
178
    return 0;
179
}
180
 
181
/*------------------------------------------------------------------------*/
182
/* default ISR                                                            */
183
 
184
#ifndef CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT
185
externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
186
{
187
#if defined(CYGDBG_HAL_MIPS_DEBUG_GDB_CTRLC_SUPPORT) &&      \
188
    defined(CYGHWR_HAL_GDB_PORT_VECTOR) &&              \
189
    defined(HAL_CTRLC_ISR)
190
 
191
#ifndef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN    
192
    if( vector == CYGHWR_HAL_GDB_PORT_VECTOR )
193
#endif        
194
    {
195
        cyg_uint32 result = HAL_CTRLC_ISR( vector, data );
196
        if( result != 0 ) return result;
197
    }
198
 
199
#if defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon)
200
#if defined(HAL_DIAG_IRQ_CHECK)
201
    {
202
        cyg_uint32 ret;
203
        /* let ROM monitor handle unexpected interrupts */
204
        HAL_DIAG_IRQ_CHECK(vector, ret);
205
        if (ret<=0)
206
            return ret;
207
    }
208
#endif // def HAL_DIAG_IRQ_CHECK
209
#endif // def CYGSEM_HAL_USE_ROM_MONITOR_CygMon
210
#endif
211
 
212
    CYG_TRACE1(true, "Interrupt: %d", vector);
213
    CYG_FAIL("Spurious Interrupt!!!");
214
    return 0;
215
}
216
 
217
#else // CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT
218
 
219
externC cyg_uint32 hal_arch_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
220
{
221
#if defined(CYGDBG_HAL_MIPS_DEBUG_GDB_CTRLC_SUPPORT) &&      \
222
    defined(CYGHWR_HAL_GDB_PORT_VECTOR) &&              \
223
    defined(HAL_CTRLC_ISR)
224
 
225
#if defined(CYGSEM_HAL_USE_ROM_MONITOR_CygMon)
226
#if defined(HAL_DIAG_IRQ_CHECK)
227
    {
228
        cyg_uint32 ret;
229
        /* let ROM monitor handle unexpected interrupts */
230
        HAL_DIAG_IRQ_CHECK(vector, ret);
231
        if (ret<=0)
232
            return ret;
233
    }
234
#endif // def HAL_DIAG_IRQ_CHECK
235
#endif // def CYGSEM_HAL_USE_ROM_MONITOR_CygMon
236
#endif
237
 
238
#ifdef CYGPKG_REDBOOT
239
    hal_ctrlc_isr( vector, data );
240
#endif    
241
 
242
    return 0;
243
}
244
 
245
#endif // CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT
246
 
247
/*------------------------------------------------------------------------*/
248
/* data copy and bss zero functions                                       */
249
 
250
typedef void (CYG_SYM_ADDRESS)(void);
251
 
252
// All these must use this type of address to stop them being given relocations
253
// relative to $gp (i.e. assuming they would be in .sdata)
254
extern CYG_SYM_ADDRESS __ram_data_start;
255
extern CYG_SYM_ADDRESS __ram_data_end;
256
extern CYG_SYM_ADDRESS __rom_data_start;
257
 
258
#ifdef CYG_HAL_STARTUP_ROM      
259
void hal_copy_data(void)
260
{
261
    char *p = (char *)&__ram_data_start;
262
    char *q = (char *)&__rom_data_start;
263
 
264
    while( p != (char *)&__ram_data_end )
265
        *p++ = *q++;
266
}
267
#endif
268
 
269
/*------------------------------------------------------------------------*/
270
 
271
#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
272
cyg_bool cyg_hal_stop_constructors;
273
#endif
274
 
275
typedef void (*pfunc) (void);
276
extern pfunc __CTOR_LIST__[];
277
extern pfunc __CTOR_END__[];
278
 
279
void
280
cyg_hal_invoke_constructors(void)
281
{
282
#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
283
    static pfunc *p = &__CTOR_END__[-1];
284
 
285
    cyg_hal_stop_constructors = 0;
286
    for (; p >= __CTOR_LIST__; p--) {
287
        (*p) ();
288
        if (cyg_hal_stop_constructors) {
289
            p--;
290
            break;
291
        }
292
    }
293
#else
294
    pfunc *p;
295
 
296
    for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--)
297
        (*p) ();
298
#endif
299
 
300
} // cyg_hal_invoke_constructors()
301
 
302
/*------------------------------------------------------------------------*/
303
/* Determine the index of the ls bit of the supplied mask.                */
304
 
305
cyg_uint32 hal_lsbit_index(cyg_uint32 mask)
306
{
307
    cyg_uint32 n = mask;
308
 
309
    static const signed char tab[64] =
310
    { -1, 0, 1, 12, 2, 6, 0, 13, 3, 0, 7, 0, 0, 0, 0, 14, 10,
311
      4, 0, 0, 8, 0, 0, 25, 0, 0, 0, 0, 0, 21, 27 , 15, 31, 11,
312
      5, 0, 0, 0, 0, 0, 9, 0, 0, 24, 0, 0 , 20, 26, 30, 0, 0, 0,
313
      0, 23, 0, 19, 29, 0, 22, 18, 28, 17, 16, 0
314
    };
315
 
316
    n &= ~(n-1UL);
317
    n = (n<<16)-n;
318
    n = (n<<6)+n;
319
    n = (n<<4)+n;
320
 
321
    return tab[n>>26];
322
}
323
 
324
/*------------------------------------------------------------------------*/
325
/* Determine the index of the ms bit of the supplied mask.                */
326
 
327
cyg_uint32 hal_msbit_index(cyg_uint32 mask)
328
{
329
    cyg_uint32 x = mask;
330
    cyg_uint32 w;
331
 
332
    /* Phase 1: make word with all ones from that one to the right */
333
    x |= x >> 16;
334
    x |= x >> 8;
335
    x |= x >> 4;
336
    x |= x >> 2;
337
    x |= x >> 1;
338
 
339
    /* Phase 2: calculate number of "1" bits in the word        */
340
    w = (x & 0x55555555) + ((x >> 1) & 0x55555555);
341
    w = (w & 0x33333333) + ((w >> 2) & 0x33333333);
342
    w = w + (w >> 4);
343
    w = (w & 0x000F000F) + ((w >> 8) & 0x000F000F);
344
    return (cyg_uint32)((w + (w >> 16)) & 0xFF) - 1;
345
 
346
}
347
 
348
/*------------------------------------------------------------------------*/
349
/* Delay for some number of useconds.                                     */
350
void
351
hal_delay_us(int us)
352
{
353
    cyg_uint32 val1, val2;
354
    int diff;
355
    long usticks;
356
    long ticks;
357
 
358
    // Calculate the number of counter register ticks per microsecond.
359
 
360
    usticks = (CYGNUM_HAL_RTC_PERIOD * CYGNUM_HAL_RTC_DENOMINATOR) / 1000000;
361
 
362
    // Make sure that the value is not zero. This will only happen if the
363
    // CPU is running at < 2MHz.
364
    if( usticks == 0 ) usticks = 1;
365
 
366
    while( us > 0 )
367
    {
368
        int us1 = us;
369
 
370
        // Wait in bursts of less than 10000us to avoid any overflow
371
        // problems in the multiply.
372
        if( us1 > 10000 )
373
            us1 = 10000;
374
 
375
        us -= us1;
376
 
377
        ticks = us1 * usticks;
378
 
379
        HAL_CLOCK_READ(&val1);
380
        while (ticks > 0) {
381
            do {
382
                HAL_CLOCK_READ(&val2);
383
            } while (val1 == val2);
384
            diff = val2 - val1;
385
            if (diff < 0) diff += CYGNUM_HAL_RTC_PERIOD;
386
            ticks -= diff;
387
            val1 = val2;
388
        }
389
    }
390
}
391
 
392
/*------------------------------------------------------------------------*/
393
 
394
void hal_arch_program_new_stack(void *_func)
395
{
396
    externC void hal_program_new_stack( void *func, CYG_ADDRESS addr);
397
    hal_program_new_stack( (void *)_func,
398
                   (CYGMEM_REGION_ram + CYGMEM_REGION_ram_SIZE - sizeof(CYG_ADDRESS)) & ~15 );
399
}
400
 
401
/*------------------------------------------------------------------------*/
402
/* Idle thread action                                                     */
403
 
404
#include <cyg/infra/diag.h>
405
 
406
void hal_idle_thread_action( cyg_uint32 count )
407
{
408
#if 0 //def CYGPKG_HAL_MIPS_SIM
409
    if( (count % 1000) == 0 )
410
    {
411
        // This code causes a fake interrupt.
412
        asm volatile (
413
            "xor    $24,$24,$24;"
414
            "mtc0   $24,$13;"
415
            "lui    $25,%%hi(1f);"
416
            "ori    $25,$25,%%lo(1f);"
417
            "j      other_vector;"
418
            "nop;"
419
            "1:"
420
            :
421
            :
422
            : "t8", "t9"
423
            );
424
    }
425
#endif
426
#if 0 //def CYGPKG_HAL_MIPS_TX39_JMR3904
427
 
428
    if( (count % 100000 ) == 0 )
429
    {
430
//        cyg_uint32 tval, isr, imr, ilr;
431
          cyg_uint32 sr = 0, cr = 0, ctr = 0, cpr = 0;
432
//        HAL_CLOCK_READ( &tval );
433
//        HAL_READ_UINT32( 0xFFFFC000, isr );
434
//        HAL_READ_UINT32( 0xFFFFC004, imr );
435
//        HAL_READ_UINT32( 0xFFFFC01C, ilr );
436
//        CYG_TRACE2(1, "Timer value, ISR ",tval, isr);
437
//        CYG_TRACE2(1, "IMR ILR0 ", imr, ilr);
438
 
439
//        asm volatile (
440
//            "mfc0  %0,$12;"
441
//            "nop; nop; nop;"
442
//            "mfc0  %1,$13;"
443
//            "nop; nop; nop;"
444
//            "mfc0  %2,$9;"
445
//            "nop; nop; nop;"
446
//            "mfc0  %3,$11;"
447
//            "nop; nop; nop;"
448
//            : "=r"(sr), "=r"(cr), "=r"(ctr), "=r"(cpr)
449
//            );
450
 
451
 
452
//        diag_printf("Status %08x ", sr );
453
//       diag_printf("Cause %08x ", cr );
454
//        diag_printf("Counter %08x ", ctr );
455
//        diag_printf("Compare %08x\n", cpr);
456
 
457
#if 0
458
        asm volatile (
459
            "mfc0  %0,$12;"
460
            "nop; nop; nop;"
461
            : "=r"(sr)
462
            );
463
        diag_write_string("Status "); diag_write_hex( sr );
464
 
465
        asm volatile (
466
            "mfc0  %0,$13;"
467
            "nop; nop; nop;"
468
            : "=r"(cr)
469
            );
470
        diag_write_string(" Cause "); diag_write_hex( cr );
471
 
472
        asm volatile (
473
            "mfc0  %0,$9;"
474
            "nop; nop; nop;"
475
            : "=r"(ctr)
476
            );
477
        diag_write_string(" Counter "); diag_write_hex( ctr );
478
 
479
        asm volatile (
480
            "mfc0  %0,$11;"
481
            "nop; nop; nop;"
482
            : "=r"(cpr)
483
            );
484
        diag_write_string(" Compare "); diag_write_hex( cpr );
485
        diag_write_string( "\n" );
486
 
487
#endif
488
#if 1         
489
        asm volatile (
490
            "mfc0  %0,$12;"
491
            "nop; nop; nop;"
492
            : "=r"(sr)
493
            );
494
 
495
        asm volatile (
496
            "mfc0  %0,$13;"
497
            "nop; nop; nop;"
498
            : "=r"(cr)
499
            );
500
 
501
        CYG_INSTRUMENT_USER( 1, sr, cr );
502
 
503
        asm volatile (
504
            "mfc0  %0,$9;"
505
            "nop; nop; nop;"
506
            : "=r"(ctr)
507
            );
508
 
509
        asm volatile (
510
            "mfc0  %0,$11;"
511
            "nop; nop; nop;"
512
            : "=r"(cpr)
513
            );
514
 
515
        CYG_INSTRUMENT_USER( 2, ctr, cpr );
516
#endif
517
 
518
//        if( count == 4 )
519
//        {
520
//            HAL_ENABLE_INTERRUPTS();
521
//        }
522
 
523
//        if( count >= 10 )
524
//            for(;;);
525
    }
526
#endif
527
#if 0
528
    {
529
        static CYG_WORD32 istat[3] = { 0xffffffff,0xffffffff,0xffffffff };
530
        int i;
531
        for( i = 0; i < 3; i++ )
532
        {
533
            CYG_WORD32 reg, sr;
534
            HAL_READ_UINT32( CYGHWR_HAL_MIPS_VRC4373_INTC_STAT0 + i * CYGHWR_HAL_MIPS_VRC4373_INTC_MASK_OFF, reg );
535
            if( reg != istat[i] )
536
            {
537
                hal_diag_ai_write_char('~');
538
                hal_diag_ai_write_char('0'+i);
539
                hal_diag_ai_write_hex8( reg );
540
                istat[i] = reg;
541
                HAL_READ_UINT32( CYGHWR_HAL_MIPS_VRC4373_INTC_MASK0 + i * CYGHWR_HAL_MIPS_VRC4373_INTC_MASK_OFF, reg );
542
                hal_diag_ai_write_char('.');
543
                hal_diag_ai_write_hex8( reg );
544
#if 0                
545
                asm volatile (
546
                    "mfc0  %0,$12;"
547
                    "nop; nop; nop;"
548
                    : "=r"(sr)
549
                    );
550
                hal_diag_ai_write_char('.');
551
                hal_diag_ai_write_hex8( sr );
552
#endif
553
            }
554
        }
555
    }
556
    {
557
        static CYG_WORD32 old_pins = 0;
558
        CYG_WORD32 reg;
559
        HAL_READ_UINT32( CYGHWR_HAL_MIPS_VRC4373_INTC_PINS, reg );
560
        if( reg != old_pins )
561
        {
562
            hal_diag_ai_write_char('%');
563
            hal_diag_ai_write_hex8( reg );
564
            old_pins = reg;
565
        }
566
    }
567
#endif
568
#if 0 //def CYGPKG_HAL_MIPS_VR4300_VRC4373
569
 
570
    // Wiggle one of the leds to show we are running
571
 
572
    if( (count % 50000 ) == 0 )
573
    {
574
        cyg_uint8 lr;
575
        { int i; for( i = 0; i < 200; i++ ); }
576
        HAL_READ_UINT8( 0xc2000008, lr );
577
        lr ^= 2;
578
        { int i; for( i = 0; i < 200; i++ ); }
579
        HAL_WRITE_UINT8( 0xc2000008, lr );
580
 
581
    }
582
#endif    
583
}
584
 
585
/*------------------------------------------------------------------------*/
586
/* End of hal_misc.c                                                      */

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