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#ifndef CYGONCE_HAL_PLF_INTR_H
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#define CYGONCE_HAL_PLF_INTR_H
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//==========================================================================
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//
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// plf_intr.h
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//
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// RefIDT 79S344A Interrupt and clock support
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): tmichals
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// Contributors:
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//
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// Date: 2002-09-20
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// Purpose: Define Interrupt support
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// Description: The macros defined here provide the HAL APIs for handling
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// interrupts and the clock for the IDT79S334A board.
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//
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// Usage:
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// #include <cyg/hal/plf_intr.h>
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// ...
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//
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <pkgconf/hal.h>
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#include <cyg/infra/cyg_type.h>
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#include <cyg/hal/plf_io.h>
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#define HAL_PLATFORM_RESET() CYG_EMPTY_STATEMENT
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#define HAL_PLATFORM_RESET_ENTRY 0xbfc00000
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//--------------------------------------------------------------------------
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// Interrupt vectors.
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#ifndef CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED
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// the default for all MIPS variants is to use the 6 bits
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// in the cause register.
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#define CYGNUM_HAL_INTERRUPT_0 0
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#define CYGNUM_HAL_INTERRUPT_1 1
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#define CYGNUM_HAL_INTERRUPT_2 2
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#define CYGNUM_HAL_INTERRUPT_3 3
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#define CYGNUM_HAL_INTERRUPT_4 4
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#define CYGNUM_HAL_INTERRUPT_5 5
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// Min/Max ISR numbers and how many there are
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#define CYGNUM_HAL_ISR_MIN 0
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#define CYGNUM_HAL_ISR_MAX 30
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#define CYGNUM_HAL_ISR_COUNT 31
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// The vector used by the Real time clock. The default here is to use
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// interrupt 5, which is connected to the counter/comparator registers
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// in many MIPS variants.
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#define CYGNUM_HAL_PCI_A CYGNUM_HAL_INTERRUPT_1
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#define CYGNUM_HAL_PCI_B CYGNUM_HAL_INTERRUPT_2
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#define CYGNUM_HAL_PCI_C CYGNUM_HAL_INTERRUPT_4
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#define CYGNUM_EXPANSION CYGNUM_HAL_INTERRUPT_3
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#ifndef CYGNUM_HAL_INTERRUPT_RTC
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#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_5
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#endif
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/* please NOTE that slot D is taken for RTC */
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#define CYGNUM_LAST_IDT_INTERRUPT 20
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#define CYGNUM_HAL_INTERRUPT_SIO_0 25
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#define CYGNUM_HAL_INTERRUPT_SIO_1 26
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#define CYGNUM_HAL_PCI_A CYGNUM_HAL_INTERRUPT_1
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#define CYGNUM_HAL_PCI_B CYGNUM_HAL_INTERRUPT_2
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#define CYGNUM_HAL_PCI_C CYGNUM_HAL_INTERRUPT_4
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#define CYGNUM_EXPANSION CYGNUM_HAL_INTERRUPT_3
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#define CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED
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#endif
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//--------------------------------------------------------------------------
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// Interrupt controller access
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// The default code here simply uses the fields present in the CP0 status
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// and cause registers to implement this functionality.
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// Beware of nops in this code. They fill delay slots and avoid CP0 hazards
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// that might otherwise cause following code to run in the wrong state or
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// cause a resource conflict.
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#ifndef CYGHWR_HAL_INTERRUPT_CONTROLLER_ACCESS_DEFINED
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#define HAL_INTERRUPT_MASK_CPU( _vector_ ) \
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CYG_MACRO_START \
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asm volatile ( \
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"mfc0 $3,$12\n" \
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"la $2,0x00000400\n" \
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"sllv $2,$2,%0\n" \
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"nor $2,$2,$0\n" \
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"and $3,$3,$2\n" \
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"mtc0 $3,$12\n" \
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"nop; nop; nop\n" \
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: \
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: "r"(_vector_) \
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: "$2", "$3" \
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); \
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CYG_MACRO_END
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#define HAL_INTERRUPT_UNMASK_CPU( _vector_ ) \
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CYG_MACRO_START \
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asm volatile ( \
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"mfc0 $3,$12\n" \
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"la $2,0x00000400\n" \
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"sllv $2,$2,%0\n" \
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"or $3,$3,$2\n" \
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"mtc0 $3,$12\n" \
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"nop; nop; nop\n" \
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: \
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: "r"(_vector_) \
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: "$2", "$3" \
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); \
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CYG_MACRO_END
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#define HAL_INTERRUPT_ACKNOWLEDGE_CPU( _vector_ ) \
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CYG_MACRO_START \
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asm volatile ( \
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"mfc0 $3,$13\n" \
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"la $2,0x00000400\n" \
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"sllv $2,$2,%0\n" \
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"nor $2,$2,$0\n" \
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"and $3,$3,$2\n" \
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"mtc0 $3,$13\n" \
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"nop; nop; nop\n" \
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: \
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: "r"(_vector_) \
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: "$2", "$3" \
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); \
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CYG_MACRO_END
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#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ )
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#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ )
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externC void cyg_hal_interrupt_mask(cyg_uint32 vector);
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externC void cyg_hal_interrupt_unmask(cyg_uint32 vector);
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externC void cyg_hal_interrupt_acknowledge(cyg_uint32 vector);
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#define HAL_INTERRUPT_MASK( _vector_ ) \
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CYG_MACRO_START \
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cyg_hal_interrupt_mask ( (_vector_) ); \
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CYG_MACRO_END
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#define HAL_INTERRUPT_UNMASK( _vector_ ) \
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CYG_MACRO_START \
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cyg_hal_interrupt_unmask ( (_vector_) ); \
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CYG_MACRO_END
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#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \
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CYG_MACRO_START \
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cyg_hal_interrupt_acknowledge ( (_vector_) ); \
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CYG_MACRO_END
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#define CYGHWR_HAL_INTERRUPT_CONTROLLER_ACCESS_DEFINED
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#endif
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#endif /* ifndef CYGONCE_HAL_PLF_INTR_H */
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//--------------------------------------------------------------------------
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// End of plf_intr.h
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