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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [mips/] [idt79s334a/] [v2_0/] [src/] [plf_stub.c] - Blame information for rev 638

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//=============================================================================
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//
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//      plf_stub.c
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//
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//      Platform specific code for GDB stub support.
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//
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//=============================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):   nickg, jskov (based on the old tx39 hal_stub.c)
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// Contributors:tmichals
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// Date:        1999-02-12
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// Purpose:     Platform specific code for GDB stub support.
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//              
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include <pkgconf/hal.h>
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#include <pkgconf/system.h>
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#include CYGBLD_HAL_PLATFORM_H
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#include <cyg/hal/drv_api.h>          // Cache handling
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#include <cyg/infra/cyg_type.h>         // Base types
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#include <cyg/infra/cyg_trac.h>         // tracing macros
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#include <cyg/infra/cyg_ass.h>          // assertion macros
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#include <cyg/hal/hal_arch.h>           // architectural definitions
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#include <cyg/hal/hal_intr.h>           // Interrupt handling
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#include <cyg/hal/hal_cache.h>          // Cache handling
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#include <cyg/hal/hal_io.h>             // HAL IO macros
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#include <cyg/hal/hal_diag.h>           // diag output. FIXME
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#include <cyg/hal/idt32334sio.h>
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#include <pkgconf/hal.h>
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#include <cyg/hal/hal_intr.h>
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#define PIO_DIRCNTL_REG         0xb8000604
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void hal_IDT32334_init_serial_baud( int baud )
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{
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        cyg_uint16 baud_divisor;
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        cyg_uint8 _lcr, _ier;
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        cyg_addrword_t port = CMA_SER_16550_BASE_A;
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        cyg_uint32  status;
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        HAL_READ_UINT32 ( PIO_DIRCNTL_REG+4, status);
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        status |= 0xf0;
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        HAL_WRITE_UINT32 ( PIO_DIRCNTL_REG+4, status);
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        HAL_READ_UINT32 (PIO_DIRCNTL_REG, status);
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        status &= 0xffffff0f;
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        status |= 0x50;
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        HAL_WRITE_UINT32(PIO_DIRCNTL_REG, status);
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        baud_divisor = (CYGHWR_HAL_MIPS_CPU_FREQ_ACTUAL) / (16 * baud);
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        // Set databits, stopbits and parity.
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        _lcr = LCR_WL8 | LCR_SB1 | LCR_PN;
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        HAL_WRITE_UINT8(port+SER_16550_LCR, _lcr);
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        // Set baud rate.
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        _lcr |= LCR_DL;
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        HAL_WRITE_UINT8(port+SER_16550_LCR, _lcr);
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        HAL_WRITE_UINT8(port+SER_16550_DLM, baud_divisor >> 8);
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        HAL_WRITE_UINT8(port+SER_16550_DLL, baud_divisor & 0xff);
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        _lcr &= ~LCR_DL;
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        HAL_WRITE_UINT8(port+SER_16550_LCR, _lcr);
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        HAL_WRITE_UINT8(port+SER_16550_FCR, 0x1);
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        HAL_WRITE_UINT8(port+SER_16550_MSR, 0x30);
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}
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#ifndef CYGNUM_IO_SERIAL_IDT32334_SERIAL0_BAUD
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# define        CYGNUM_IO_SERIAL_IDT32334_SERIAL0_BAUD 115200
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#endif
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// Initialize the current serial port.
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void hal_IDT32334_init_serial( void )
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{
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         hal_IDT32334_init_serial_baud(  CYGNUM_IO_SERIAL_IDT32334_SERIAL0_BAUD);
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}
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// Write C to the current serial port.
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void hal_IDT32334_put_char( int c )
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{
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        cyg_uint8 _lsr;
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        cyg_addrword_t port =CMA_SER_16550_BASE_A;
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        do
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        {
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                HAL_READ_UINT8(port+SER_16550_LSR, _lsr);
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        }while ( !(_lsr & SIO_LSR_THRE)  && (_lsr));
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        if ((_lsr & SIO_LSR_THRE) || (!_lsr))
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                HAL_WRITE_UINT8(port+SER_16550_THR, c);
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}
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// Read one character from the current serial port.
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int hal_IDT32334_get_char( void )
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{
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        unsigned char c;
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        cyg_uint8 _lsr;
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        cyg_addrword_t port = CMA_SER_16550_BASE_A;
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        do {
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                HAL_READ_UINT8(port+SER_16550_LSR, _lsr);
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        } while ((_lsr & SIO_LSR_DR) == 0);
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        HAL_READ_UINT8(port+SER_16550_RBR, c);
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        return c;
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}
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int hal_IDT32334_chk_char()
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{
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        unsigned char c;
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        cyg_uint8 _lsr;
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        cyg_addrword_t port = CMA_SER_16550_BASE_A;
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        HAL_READ_UINT8(port+SER_16550_LSR, _lsr);
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        return (_lsr & SIO_LSR_DR)?1:0;
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}
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//#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
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//-----------------------------------------------------------------------------
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// End of plf_stub.c

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