1 |
27 |
unneback |
2002-08-06 Gary Thomas
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2 |
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2002-08-06 Motoya Kurotsu
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3 |
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4 |
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* src/ser16c550c.c: I/O channel data can't be constant - contains
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5 |
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timeout information which can be changed.
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6 |
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7 |
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2002-02-11 Jesper Skov
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8 |
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9 |
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* include/platform.inc: Added hal_intc_translate that knows about
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10 |
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the special trampoline code.
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11 |
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12 |
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* include/plf_intr.h: Updated comment.
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13 |
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14 |
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2002-02-05 Jesper Skov
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15 |
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16 |
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* include/plf_intr.h: Always define the vectors, regardless of
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17 |
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chaining configuration.
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18 |
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19 |
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2002-01-31 Jesper Skov
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20 |
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21 |
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* src/platform.S (hal_isr_springboard_southbridge): Apply mask to
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22 |
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interrupt flags - I've seen requests set for masked
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23 |
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interrupts. Also don't check the slave controller unless the
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24 |
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cascade request is set.
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25 |
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26 |
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2001-12-06 Nick Garnett
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27 |
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28 |
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* images/redboot_RAM_5kc.elf
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29 |
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* images/redboot_RAM_5kc.srec
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30 |
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* images/redboot_ROM_5kc.elf
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31 |
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* images/redboot_ROM_5kc.fl
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32 |
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* images/redboot_ROM_5kc.srec
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33 |
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Added these images for 5kc target.
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34 |
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35 |
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* images/redboot_RAM.elf
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36 |
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* images/redboot_RAM.srec
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37 |
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* images/redboot_ROM.elf
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38 |
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* images/redboot_ROM.fl
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39 |
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* images/redboot_ROM.srec
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40 |
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Updated these images to match the 5kc ones. These images are for
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41 |
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Malta boards with the 4kc processor. These will actually run in a
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42 |
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5kc, but will treat it as a 32bit CPU, and will not provide 64bit
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43 |
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state to GDB.
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44 |
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45 |
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2001-12-04 Nick Garnett
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46 |
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47 |
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* misc/redboot_ROM.ecm: Commented out CYGSEM_REDBOOT_DISK_ISO9660
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48 |
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since its presence causes CDL and compilation errors.
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49 |
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50 |
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2001-11-06 Mark Salter
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51 |
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52 |
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* misc/redboot_ROM.ecm: Cleanup to support both mips32 and mips64.
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53 |
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* misc/redboot_RAM.ecm: Ditto.
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54 |
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55 |
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2001-10-31 Jonathan Larmour
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56 |
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57 |
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* cdl/hal_mips_malta.cdl: Indicate support of variable baud rates.
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58 |
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59 |
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2001-07-24 Mark Salter
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60 |
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61 |
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* src/plf_misc.c (cyg_hal_plf_ide_init): New function to enable IDE
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62 |
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controllers.
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63 |
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(cyg_hal_plf_pci_init): Move ISA bridge setup from cyg_hal_plf_pci_init
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64 |
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* include/plf_io.h: Add IDE i/f macros.
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65 |
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* cdl/hal_mips_malta.cdl: Now implements CYGINT_HAL_PLF_IF_IDE.
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66 |
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67 |
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2001-07-17 David Woodhouse
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68 |
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69 |
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* src/redboot_cmds.c: Remove. Superseded by generic MIPS exec.
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70 |
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* cdl/hal_mips_malta.cdl: Remove reference to $1
|
71 |
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72 |
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2001-07-13 Jesper Skov
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73 |
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74 |
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* include/plf_io.h (HAL_PCI_ALLOC_BASE_IO): Reserve 64kB for
|
75 |
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southbridge instead of 8kB.
|
76 |
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77 |
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2001-07-12 Jesper Skov
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78 |
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79 |
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* include/plf_io.h: Fix errors.
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80 |
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81 |
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2001-07-05 Jesper Skov
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82 |
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83 |
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* include/plf_io.h: Added PCI/CPU address translation macros.
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84 |
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85 |
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2001-06-27 Mark Salter
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86 |
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87 |
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* misc/redboot_RAM.ecm (CYGSEM_REDBOOT_BSP_SYSCALLS): Enable GNUPro
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88 |
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syscalls.
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89 |
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* misc/redboot_ROM.ecm (CYGSEM_REDBOOT_BSP_SYSCALLS): Ditto.
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90 |
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91 |
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2001-06-06 Jesper Skov
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92 |
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93 |
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* include/plf_io.h (HAL_PCI_TRANSLATE_INTERRUPT): Defined.
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94 |
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95 |
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* include/plf_intr.h: Made safe to include from assembly files.
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96 |
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* src/plf_mk_defs.c (main): Deleted interrupt vector definitions.
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97 |
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98 |
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* src/ser16c550c.c: Fix warning.
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99 |
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100 |
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* src/platform.S: Add .noreorder statements.
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101 |
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102 |
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2001-06-05 Jesper Skov
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103 |
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104 |
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* src/platform.S (hal_isr_springboard_southbridge): Use delay
|
105 |
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slots, return 0 for spurious interrupts.
|
106 |
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107 |
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2001-06-01 Jesper Skov
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108 |
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109 |
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* src/plf_mk_defs.c: Added CYGNUM_HAL_INTERRUPT_CASCADE.
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110 |
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111 |
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* src/plf_misc.c (hal_init_irq): Fix enabling of cascading
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112 |
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interrupts from secondary controller.
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113 |
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114 |
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* src/platform.S (hal_isr_springboard_southbridge): Fixed decoding
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115 |
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of secondary sources. Bail out on spurious interrups.
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116 |
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117 |
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2001-04-26 Mark Salter
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118 |
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119 |
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* include/plf_io.h (HAL_PCI_ALLOC_BASE_MEMORY): Fix typo.
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120 |
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121 |
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* cdl/hal_mips_malta.cdl (CYGNUM_HAL_RTC_PERIOD): Fix calculation to
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122 |
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be based on one half of the CPU clock frequency.
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123 |
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124 |
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2001-04-23 Mark Salter
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125 |
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126 |
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* include/plf_io.h: Adjust PCI memory and io base constants so that
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127 |
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CPU/PCI addresses match the GT64120 setup. Change PCI memory alloc
|
128 |
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base to allow for memory used by south bridge.
|
129 |
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130 |
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2001-04-11 Jesper Skov
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131 |
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132 |
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* src/plf_mk_defs.c: Added a few more defs.
|
133 |
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134 |
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* src/platform.S: Added southbridge springboard for interrupt
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135 |
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decoding.
|
136 |
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|
137 |
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* include/plf_io.h: Carve out a bit of memory at 0 in the PCI IO
|
138 |
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space. Otherwise PCI devices get assigned space which the lana
|
139 |
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southbridge is hardwired to. Also moved PCI register defs to this
|
140 |
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file.
|
141 |
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|
142 |
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* src/plf_misc.c: Added PCI interrupt routing setup.
|
143 |
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144 |
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2001-04-10 Jesper Skov
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145 |
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146 |
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* src/ser16c550c.c (cyg_hal_plf_serial_init_channel): Allow
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147 |
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interrupts.
|
148 |
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|
149 |
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* include/plf_io.h (HAL_PIIX4_ELCR2): Fix typo.
|
150 |
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|
151 |
|
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* src/plf_misc.c (hal_init_irq): Added.
|
152 |
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(hal_init_irq): Use byte access to SERIRQ.
|
153 |
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154 |
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* include/plf_io.h: Replaced interrupt definitions.
|
155 |
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156 |
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* include/plf_intr.h: Proper interrupt handling.
|
157 |
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158 |
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* include/platform.inc: Removed hal_intc_decode.
|
159 |
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160 |
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* misc/redboot_RAM.ecm: Added decompression support.
|
161 |
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* misc/redboot_ROM.ecm: Same.
|
162 |
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163 |
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* include/pkgconf/mlt_mips_malta_ram.mlt: Give RedBoot even more
|
164 |
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space.
|
165 |
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* include/pkgconf/mlt_mips_malta_ram.ldi: Same.
|
166 |
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* include/pkgconf/mlt_mips_malta_ram.h: Same.
|
167 |
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168 |
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2001-04-09 Jesper Skov
|
169 |
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|
170 |
|
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* include/pkgconf/mlt_mips_malta_ram.h: Changed base address.
|
171 |
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* include/pkgconf/mlt_mips_malta_ram.mlt: Same.
|
172 |
|
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* include/pkgconf/mlt_mips_malta_ram.ldi: Same.
|
173 |
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|
174 |
|
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* misc/redboot_ROM.ecm: Updated.
|
175 |
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|
176 |
|
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* include/pkgconf/mlt_mips_malta_rom.h: Updated.
|
177 |
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* include/pkgconf/mlt_mips_malta_rom.ldi: Same.
|
178 |
|
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* include/pkgconf/mlt_mips_malta_rom.mlt: Same.
|
179 |
|
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* include/pkgconf/mlt_mips_malta_ram.h: Updated.
|
180 |
|
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* include/pkgconf/mlt_mips_malta_ram.ldi: Same.
|
181 |
|
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* include/pkgconf/mlt_mips_malta_ram.mlt: Same.
|
182 |
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183 |
|
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* src/plf_mk_defs.c: Added.
|
184 |
|
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* cdl/hal_mips_malta.cdl: Build mk_defs file.
|
185 |
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* src/platform.S: Get table size def from header.
|
186 |
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187 |
|
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2001-04-03 Jesper Skov
|
188 |
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|
189 |
|
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* misc/redboot_RAM.ecm: Added net packages.
|
190 |
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|
191 |
|
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* include/pkgconf/mlt_mips_malta_ram.h: Hacked in some PCI memory.
|
192 |
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* include/pkgconf/mlt_mips_malta_ram.ldi: Same.
|
193 |
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|
194 |
|
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2001-04-02 Jesper Skov
|
195 |
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|
196 |
|
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* src/ser16c550c.c: Removed debug channel definitions, added
|
197 |
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second port.
|
198 |
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|
199 |
|
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* include/plf_intr.h: Removed UART vector.
|
200 |
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|
201 |
|
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* src/plf_misc.c: Moved SMSC superIO init code...
|
202 |
|
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* src/smsc37m81x.c (cyg_hal_init_superIO): to here.
|
203 |
|
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* cdl/hal_mips_malta.cdl: Compile new file.
|
204 |
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|
205 |
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2001-03-23 Jesper Skov
|
206 |
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|
207 |
|
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* src/plf_misc.c (hal_platform_init): Initialize PIIX4 and set up
|
208 |
|
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COM1 for the SMSC SuperIO part. Now we have serial output. Wohoo!
|
209 |
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|
210 |
|
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* include/plf_io.h: Added a few new definitions.
|
211 |
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|
212 |
|
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* src/platform.S: Enable Galileo as PCI master. Make all PCI IO be
|
213 |
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offset from zero to make PIIX4 happy.
|
214 |
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|
215 |
|
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* include/plf_intr.h (CYGNUM_HAL_INTERRUPT_EXTERNAL_BASE): Added.
|
216 |
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|
217 |
|
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* misc/redboot_ROM.ecm: Updated.
|
218 |
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|
219 |
|
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* src/platform.S: Use correct ISR count (hack).
|
220 |
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|
221 |
|
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* include/platform.inc: Remove RAM SDRAM init hack.
|
222 |
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|
223 |
|
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* src/platform.S: SDP: Fix sizing logic.
|
224 |
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|
225 |
|
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* include/plf_io.h (HAL_SPD_GET_SDRAM_WIDTH): Changed to width of
|
226 |
|
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DIMM instead of width of individual SDRAM devices.
|
227 |
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|
228 |
|
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2001-03-22 Jesper Skov
|
229 |
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|
230 |
|
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* src/platform.S: Remove some of the hacks.
|
231 |
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|
232 |
|
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* include/plf_io.h (HAL_I2C_READ, HAL_I2C_WRITE): Get these right,
|
233 |
|
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and the code works. Sheesh!
|
234 |
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|
235 |
|
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* src/platform.S: Minor tweaks to make I2C code match that in
|
236 |
|
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YAMON. Still doesn't work though.
|
237 |
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|
238 |
|
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* include/platform.inc: Hacked to enable SDRAM init.
|
239 |
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|
240 |
|
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* src/platform.S: Rewrote to use simpler macros.
|
241 |
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|
242 |
|
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* src/plf_misc.c: Removed some CYGMON stuff.
|
243 |
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|
244 |
|
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* include/plf_io.h: Added simpler definitions for I2C access.
|
245 |
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|
246 |
|
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* src/plf_misc.c (hal_platform_init): Fix warning.
|
247 |
|
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|
248 |
|
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* src/platform.S: Rewrote I2C code for FPGA controller.
|
249 |
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|
250 |
|
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* include/pkgconf/mlt_mips_malta_rom.h: Updated.
|
251 |
|
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* include/pkgconf/mlt_mips_malta_rom.mlt: Same.
|
252 |
|
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* include/pkgconf/mlt_mips_malta_rom.ldi: Same.
|
253 |
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|
254 |
|
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* include/plf_io.h: Added I2C definitions for FPGA I2C
|
255 |
|
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controller.
|
256 |
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|
257 |
|
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* cdl/hal_mips_malta.cdl: Added clock option.
|
258 |
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|
259 |
|
|
2001-03-21 Jesper Skov
|
260 |
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|
261 |
|
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* misc/redboot_RAM.ecm: Updated.
|
262 |
|
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|
263 |
|
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* src/plf_misc.c: Always init PCI. Wait for reset.
|
264 |
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|
265 |
|
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2001-03-20 Jesper Skov
|
266 |
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|
267 |
|
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* src/ser16c550c.c: Work with either the debug UART (untested) or
|
268 |
|
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the SuperIO controllers. Clean up baud rate stuff.
|
269 |
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|
270 |
|
|
* src/plf_misc.c (cyg_hal_plf_pci_init): Disable init code for
|
271 |
|
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now.
|
272 |
|
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|
273 |
|
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* include/platform.inc: Removed ROMRAM startup stuff.
|
274 |
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|
275 |
|
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* cdl/hal_mips_malta.cdl: Changed some default settings.
|
276 |
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|
277 |
|
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* src/plf_misc.c: Removed test code and CYGMON init code.
|
278 |
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|
279 |
|
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* misc/redboot_RAM.ecm: Updated with new options.
|
280 |
|
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|
281 |
|
|
* src/ser16c550c.c: Changes to use SuperIO in PCI space.
|
282 |
|
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|
283 |
|
|
* cdl/hal_mips_malta.cdl: Replace old baud rate options with
|
284 |
|
|
CYGNUM_HAL_VIRTUAL_VECTOR_CHANNELS_DEFAULT_BAUD.
|
285 |
|
|
* src/redboot_cmds.c (do_exec): Use
|
286 |
|
|
CYGNUM_HAL_VIRTUAL_VECTOR_CHANNELS_DEFAULT_BAUD.
|
287 |
|
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|
288 |
|
|
* Package cloned from Atlas package.
|
289 |
|
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|
290 |
|
|
//===========================================================================
|
291 |
|
|
//####ECOSGPLCOPYRIGHTBEGIN####
|
292 |
|
|
// -------------------------------------------
|
293 |
|
|
// This file is part of eCos, the Embedded Configurable Operating System.
|
294 |
|
|
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
|
295 |
|
|
//
|
296 |
|
|
// eCos is free software; you can redistribute it and/or modify it under
|
297 |
|
|
// the terms of the GNU General Public License as published by the Free
|
298 |
|
|
// Software Foundation; either version 2 or (at your option) any later version.
|
299 |
|
|
//
|
300 |
|
|
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
|
301 |
|
|
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
302 |
|
|
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
303 |
|
|
// for more details.
|
304 |
|
|
//
|
305 |
|
|
// You should have received a copy of the GNU General Public License along
|
306 |
|
|
// with eCos; if not, write to the Free Software Foundation, Inc.,
|
307 |
|
|
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
|
308 |
|
|
//
|
309 |
|
|
// As a special exception, if other files instantiate templates or use macros
|
310 |
|
|
// or inline functions from this file, or you compile this file and link it
|
311 |
|
|
// with other works to produce a work based on this file, this file does not
|
312 |
|
|
// by itself cause the resulting work to be covered by the GNU General Public
|
313 |
|
|
// License. However the source code for this file must still be made available
|
314 |
|
|
// in accordance with section (3) of the GNU General Public License.
|
315 |
|
|
//
|
316 |
|
|
// This exception does not invalidate any other reasons why a work based on
|
317 |
|
|
// this file might be covered by the GNU General Public License.
|
318 |
|
|
//
|
319 |
|
|
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
|
320 |
|
|
// at http://sources.redhat.com/ecos/ecos-license/
|
321 |
|
|
// -------------------------------------------
|
322 |
|
|
//####ECOSGPLCOPYRIGHTEND####
|
323 |
|
|
//===========================================================================
|