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//=============================================================================
//
//      smsc37m81x.c
//
//      Init code for SMSC 37m81x super IO controller
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):   jskov
// Contributors:jskov
// Date:        2001-04-02
// Description: Init code for SMSC 37m81x super IO controller
//
//####DESCRIPTIONEND####
//
//=============================================================================
 
#include <pkgconf/hal.h>
#include CYGBLD_HAL_PLATFORM_H
 
#include <cyg/hal/hal_arch.h>           // SAVE/RESTORE GP macros
#include <cyg/hal/hal_io.h>             // IO macros
#include <cyg/hal/hal_intr.h>           // interrupt vectors
 
 
// From page 137+ in SMSC-37m81x.pdf
#define SMSC_CONFIG             0xb80003f0
#define SMSC_CONFIG_DATA        0xb80003f1
 
#define SMSC_CONFIG_DEV         0x07
#define SMSC_CONFIG_ACTIVATE    0x30
#define SMSC_CONFIG_ENTER       0x55
#define SMSC_CONFIG_BASE_HIGH   0x60
#define SMSC_CONFIG_BASE_LOW    0x61
#define SMSC_CONFIG_IRQ         0x70
#define SMSC_CONFIG_EXIT        0xaa
#define SMSC_CONFIG_MODE        0xf0
 
#define SMSC_CONFIG_DEV_COM1    0x04
#define SMSC_CONFIG_DEV_COM2    0x05
 
#define SMSC_CONFIG_MODE_HIGH   0x02
 
#define SMSC_CONFIG_ACTIVATE_ENABLE 0x01
 
 
void
cyg_hal_init_superIO(void)
{
    HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_ENTER);
 
    // Configure and enable COM1
    HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_DEV);
    HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_DEV_COM1);
 
    HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_HIGH);
    HAL_WRITE_UINT8(SMSC_CONFIG_DATA, 0x03);
    HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_LOW);
    HAL_WRITE_UINT8(SMSC_CONFIG_DATA, 0xf8);
 
    HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_IRQ);
    HAL_WRITE_UINT8(SMSC_CONFIG_DATA,
                    (CYGNUM_HAL_INTERRUPT_TTY0-CYGNUM_HAL_INTERRUPT_EXTERNAL_BASE));
 
    HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_MODE);
    HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_MODE_HIGH);
 
    HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_ACTIVATE);
    HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_ACTIVATE_ENABLE);
 
    // Configure and enable COM2
    HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_DEV);
    HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_DEV_COM2);
 
    HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_HIGH);
    HAL_WRITE_UINT8(SMSC_CONFIG_DATA, 0x02);
    HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_LOW);
    HAL_WRITE_UINT8(SMSC_CONFIG_DATA, 0xf8);
 
    HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_IRQ);
    HAL_WRITE_UINT8(SMSC_CONFIG_DATA,
                    (CYGNUM_HAL_INTERRUPT_TTY1-CYGNUM_HAL_INTERRUPT_EXTERNAL_BASE));
 
    HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_MODE);
    HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_MODE_HIGH);
 
    HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_ACTIVATE);
    HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_ACTIVATE_ENABLE);
 
    HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_EXIT);
 
}
 
//-----------------------------------------------------------------------------
// end of smsc37m81x.c
 

Line No.	Rev	Author	Line
1	27	unneback	`//=============================================================================`
2			`//`
3			`// smsc37m81x.c`
4			`//`
5			`// Init code for SMSC 37m81x super IO controller`
6			`//`
7			`//=============================================================================`
8			`//####ECOSGPLCOPYRIGHTBEGIN####`
9			`// -------------------------------------------`
10			`// This file is part of eCos, the Embedded Configurable Operating System.`
11			`// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.`
12			`//`
13			`// eCos is free software; you can redistribute it and/or modify it under`
14			`// the terms of the GNU General Public License as published by the Free`
15			`// Software Foundation; either version 2 or (at your option) any later version.`
16			`//`
17			`// eCos is distributed in the hope that it will be useful, but WITHOUT ANY`
18			`// WARRANTY; without even the implied warranty of MERCHANTABILITY or`
19			`// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License`
20			`// for more details.`
21			`//`
22			`// You should have received a copy of the GNU General Public License along`
23			`// with eCos; if not, write to the Free Software Foundation, Inc.,`
24			`// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.`
25			`//`
26			`// As a special exception, if other files instantiate templates or use macros`
27			`// or inline functions from this file, or you compile this file and link it`
28			`// with other works to produce a work based on this file, this file does not`
29			`// by itself cause the resulting work to be covered by the GNU General Public`
30			`// License. However the source code for this file must still be made available`
31			`// in accordance with section (3) of the GNU General Public License.`
32			`//`
33			`// This exception does not invalidate any other reasons why a work based on`
34			`// this file might be covered by the GNU General Public License.`
35			`//`
36			`// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.`
37			`// at http://sources.redhat.com/ecos/ecos-license/`
38			`// -------------------------------------------`
39			`//####ECOSGPLCOPYRIGHTEND####`
40			`//=============================================================================`
41			`//#####DESCRIPTIONBEGIN####`
42			`//`
43			`// Author(s): jskov`
44			`// Contributors:jskov`
45			`// Date: 2001-04-02`
46			`// Description: Init code for SMSC 37m81x super IO controller`
47			`//`
48			`//####DESCRIPTIONEND####`
49			`//`
50			`//=============================================================================`
51
52			`#include <pkgconf/hal.h>`
53			`#include CYGBLD_HAL_PLATFORM_H`
54
55			`#include <cyg/hal/hal_arch.h> // SAVE/RESTORE GP macros`
56			`#include <cyg/hal/hal_io.h> // IO macros`
57			`#include <cyg/hal/hal_intr.h> // interrupt vectors`
58
59
60			`// From page 137+ in SMSC-37m81x.pdf`
61			`#define SMSC_CONFIG 0xb80003f0`
62			`#define SMSC_CONFIG_DATA 0xb80003f1`
63
64			`#define SMSC_CONFIG_DEV 0x07`
65			`#define SMSC_CONFIG_ACTIVATE 0x30`
66			`#define SMSC_CONFIG_ENTER 0x55`
67			`#define SMSC_CONFIG_BASE_HIGH 0x60`
68			`#define SMSC_CONFIG_BASE_LOW 0x61`
69			`#define SMSC_CONFIG_IRQ 0x70`
70			`#define SMSC_CONFIG_EXIT 0xaa`
71			`#define SMSC_CONFIG_MODE 0xf0`
72
73			`#define SMSC_CONFIG_DEV_COM1 0x04`
74			`#define SMSC_CONFIG_DEV_COM2 0x05`
75
76			`#define SMSC_CONFIG_MODE_HIGH 0x02`
77
78			`#define SMSC_CONFIG_ACTIVATE_ENABLE 0x01`
79
80
81			`void`
82			`cyg_hal_init_superIO(void)`
83			`{`
84			`HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_ENTER);`
85
86			`// Configure and enable COM1`
87			`HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_DEV);`
88			`HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_DEV_COM1);`
89
90			`HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_HIGH);`
91			`HAL_WRITE_UINT8(SMSC_CONFIG_DATA, 0x03);`
92			`HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_LOW);`
93			`HAL_WRITE_UINT8(SMSC_CONFIG_DATA, 0xf8);`
94
95			`HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_IRQ);`
96			`HAL_WRITE_UINT8(SMSC_CONFIG_DATA,`
97			`(CYGNUM_HAL_INTERRUPT_TTY0-CYGNUM_HAL_INTERRUPT_EXTERNAL_BASE));`
98
99			`HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_MODE);`
100			`HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_MODE_HIGH);`
101
102			`HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_ACTIVATE);`
103			`HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_ACTIVATE_ENABLE);`
104
105			`// Configure and enable COM2`
106			`HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_DEV);`
107			`HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_DEV_COM2);`
108
109			`HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_HIGH);`
110			`HAL_WRITE_UINT8(SMSC_CONFIG_DATA, 0x02);`
111			`HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_BASE_LOW);`
112			`HAL_WRITE_UINT8(SMSC_CONFIG_DATA, 0xf8);`
113
114			`HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_IRQ);`
115			`HAL_WRITE_UINT8(SMSC_CONFIG_DATA,`
116			`(CYGNUM_HAL_INTERRUPT_TTY1-CYGNUM_HAL_INTERRUPT_EXTERNAL_BASE));`
117
118			`HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_MODE);`
119			`HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_MODE_HIGH);`
120
121			`HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_ACTIVATE);`
122			`HAL_WRITE_UINT8(SMSC_CONFIG_DATA, SMSC_CONFIG_ACTIVATE_ENABLE);`
123
124			`HAL_WRITE_UINT8(SMSC_CONFIG, SMSC_CONFIG_EXIT);`
125
126			`}`
127
128			`//-----------------------------------------------------------------------------`
129			`// end of smsc37m81x.c`
130

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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [mips/] [malta/] [v2_0/] [src/] [smsc37m81x.c] - Blame information for rev 737