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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [mips/] [upd985xx/] [v2_0/] [ChangeLog] - Blame information for rev 663

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Line No. Rev Author Line
1 27 unneback
2003-04-10  Nick Garnett  
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        * src/hal_mips_upd985xx.ld:
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        Added libsupc++.a to GROUP() directive for GCC versions later than
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        3.0.
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7
2002-04-02  Hugo Tyson  
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2002-04-02  Anssi Pulkkinen 
9
 
10
        * src/var_misc.c (cyg_hal_interrupt_acknowledge): Remove the read
11
        of the read-clear ISR register - it loses other pending interrupt
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        sources.  Thanks to ASCOM for spotting this.  It should have been
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        removed when the soft-copy and arbitration ISR were added, because
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        those changes mean the hardware register would already be cleared
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        down.
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2002-01-22  Hugo Tyson  
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        * cdl/hal_mips_upd985xx.cdl: CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN
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        must not be enabled because the way the arbitration ISR is
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        attached does not work with chained interrupts.
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23
2001-10-30  Jonathan Larmour  
24
 
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        * cdl/hal_mips_upd985xx.cdl (CYGHWR_HAL_MIPS_UPD985XX_DIAG_BAUD):
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        This is the same as CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD
27
        which RedBoot uses, so define it.
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        And also reimplement CYGINT_HAL_VIRTUAL_VECTOR_COMM_BAUD_SUPPORT
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        as this is what makes it work.
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31
2001-10-30  Hugo Tyson  
32
 
33
        * cdl/hal_mips_upd985xx.cdl: Platform does *not* implement VV baud
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        operations, in fact the implements
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        CYGINT_HAL_VIRTUAL_VECTOR_COMM_BAUD_SUPPORT prevents it building.
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37
2001-10-09  Hugo Tyson  
38
 
39
        * cdl/hal_mips_upd985xx.cdl (..._MIPS_UPD985XX_HARDWARE_BUGS...):
40
        New CDL options to control workarounds for System Controller bugs
41
        S1 and S2.  Shorthand for S1 requires the fixes elsewhere.  That
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        for S2 selects alternate versions of the interrupt code.
43
 
44
        * include/var_intr.h (HAL_INTERRUPT_ACKNOWLEDGE,...): Alternative
45
        versions which call the new routines in src/var_misc.c to deal
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        with System Controller interrupts.
47
 
48
        * src/var_misc.c (cyg_hal_interrupt_unmask,...): New routines to
49
        manage the System Controller interrupts by software rather than
50
        S_ISR/S_IMR.  We never mask an interrupt once unmasked, but let
51
        the interrupt happen, fielding it silently.  When/if it becomes
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        unmasked, then we call the ISR &c.
53
 
54
2001-08-17  Jonathan Larmour  
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56
        * cdl/hal_mips_upd985xx.cdl: Platform implements VV baud operations.
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58
2001-08-08  Hugo Tyson  
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60
        * include/variant.inc (hal_intc_decode): Do not decode the S_ISR
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        interrupts after all - they must be handled by arbitration.  So
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        any S_ISR interrupt is reported as CYGNUM_HAL_INTERRUPT_SYSCTL -
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        Who are they?  They are *all* number 6.
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65
        * src/var_misc.c (_arbitration_isr): New routine to arbitrate
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        between - and call all of - the interrupt sources that hang off
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        the system controller S_ISR register, because the S_ISR register
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        is read-clear, and the interrupt sources are edge-triggered so
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        they do not re-assert themselves - so we must address multiple
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        sources per actual interrupt.
71
        (hal_variant_init): Install _arbitration_isr() on the SYSCTL
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        interrupt at startup.
73
 
74
        * include/var_intr.h: Commented the change in interrupt usage -
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        the SYSCTL is occupied from time zero.
76
 
77
2001-08-01  Hugo Tyson  
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        * src/hal_mips_upd985xx.ld (hal_interrupt_sr_mask_shadow_base):
80
        This must be placed statically so it is shared with RedBoot.  And
81
        it must be an array so that we can address it from afar.
82
 
83
        * include/var_intr.h (HAL_DISABLE_INTERRUPTS): Implement this
84
        macro and its fellows as well as the individual MASK/UNMASK
85
        routines; these work together to keep the SR IM bits "true" to
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        what is intended by means of a shadow variable.  Otherwise a race
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        condition in the vanilla HAL_DISABLE_INTERRUPTS() can discard an
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        interrupt mask change made by an ISR.
89
        (hal_interrupt_sr_mask_shadow): declare this and define it to
90
        entry zero of hal_interrupt_sr_mask_shadow_base[].
91
 
92
        * src/var_misc.c (hal_interrupt_sr_mask_shadow): initialize this
93
        new variable.
94
 
95
        * cdl/hal_mips_upd985xx.cdl (CYGPKG_HAL_MIPS_UPD985XX): set
96
        CYGINT_HAL_MIPS_INTERRUPT_RETURN_KEEP_SR_IM because we use bits
97
        within the SR for interrupt control.
98
 
99
2001-07-25  Hugo Tyson  
100
 
101
        * include/var_intr.h (CYGNUM_HAL_INTERRUPT_SOFT_ZERO)
102
        (CYGNUM_HAL_INTERRUPT_SOFT_ONE): New interrupt numbers for
103
        software interrupts 0 and 1.  Also mask, unmask, and ack them
104
        correctly; ack clears the R/W bit in the cause regsiter.
105
 
106
        * include/variant.inc (hal_intc_decode) : Decode Software
107
        interrupts into numbers 0 and 1 - all else are moved up a bit.
108
 
109
2001-07-20  Hugo Tyson  
110
 
111
        * cdl/hal_mips_upd985xx.cdl: Demand that CYGPKG_LIBM includes
112
        -fno-strict-aliasing in its CFLAGS_ADD to workaround a tools issue
113
        with access to double via pointer-to-union casts.
114
 
115
2001-07-18  Hugo Tyson  
116
 
117
        * include/var_arch.h (UARTLCR_8N1): Add more divers definitions of
118
        UART control bits for implementing all the controls in the serial
119
        device that nobody ever uses.
120
 
121
2001-07-17  Hugo Tyson  
122
 
123
        * include/variant.inc: If RAM startup, don't blow away the
124
        contents of cache - it might contain things that matter such as
125
        debug connection state.
126
 
127
2001-07-09  Hugo Tyson  
128
 
129
        * include/var_arch.h (SDMDR_INIT): Change one of the numbers to
130
        match what's in the hardware when set up by customer code.
131
 
132
        * include/variant.inc: Remove dependency on temporary development
133
        config point CYGBLD_HAL_STARTUP_ROM_POST_OMIT_INITIALIZATION - the
134
        initialization now works OK.  So hal_memc_setup_table gets called.
135
 
136
        * src/variant.S (hal_memc_setup_table): ROM startup now works, so
137
        this code now gets called.
138
 
139
2001-07-06  Hugo Tyson  
140
 
141
        * src/hal_diag.c (hal_uart_init): Ensure that we use the internal
142
        baud clock because there is no external one.
143
 
144
        * include/var_arch.h (UARTCLOCK): Clock is now 50MHz for "new"
145
        boards, not 18.xMHz any more.
146
 
147
2001-07-03  Hugo Tyson  
148
 
149
        * include/var_intr.h (HAL_INTERRUPT_[UN]MASK): Better manipulate
150
        these with interrupts disabled for atomicity.
151
 
152
2001-07-02  Bart Veer  
153
 
154
        * src/var_misc.c (hal_variant_init):
155
        Move the GPIO0 manipulating (flash programming voltagE)
156
        to the platform-init.
157
 
158
2001-06-27  Hugo Tyson  
159
 
160
        This all fixes the serial interrupt problem of 2001-06-26.
161
 
162
        * src/var_misc.c (hal_variant_init): Initialize the system
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        controller's ISR/IMR registers to mask and ack all external
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        interrupts and then enable the underlying interrupt source that
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        controls them all.
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        Also provide hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT]; &c for
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        use by system in vectors.S, and initialize them.
168
 
169
        * src/hal_diag.c (cyg_hal_plf_serial_isr): Do not paranoically
170
        acknowledge spurious interrupts.  No need.
171
 
172
        * include/variant.inc: Add complete redefinitions of interrupt
173
        decoding to handle extended interrupt sources from the system
174
        controller's ISR/IMR registers.
175
 
176
        * include/var_intr.h: Add complete redefinitions of interrupt
177
        management to handle extended interrupt sources from the system
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        controller's ISR/IMR registers.
179
 
180
        * include/var_arch.h (S_ISR_ADR): Add ISR and IMR register
181
        addresses for use by assembly files.
182
 
183
        * include/plf_stub.h: Provide proto for cyg_hal_plf_comms_init()
184
        to reduce warning.
185
 
186
2001-06-26  Hugo Tyson  
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188
        * cdl/hal_mips_upd985xx.cdl: Remove src/var_stub.c - functionality
189
        is duplicated in the common HAL.
190
 
191
        * include/plf_stub.h: Remove a load of unneccessary cruft which is
192
        duplicated in the common HAL.
193
 
194
        * src/var_stub.c: Removed.
195
 
196
2001-06-26  Hugo Tyson  
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198
        * src/var_misc.c (hal_variant_init): Unmask the UART interrupt in
199
        the system controller - this is before the interrupt system in the
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        MIPS core which is used for dynamic control.
201
 
202
        Also removed a load of duplicate hal_ctrlc_isr/HAL_CTRLC_ISR stuff
203
        that fought with the common HAL,
204
 
205
        Asynchronous CTRL-C still does not work.  The interrupt asserts
206
        forever.  This is similar to System Controller known bug S2
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        "Interrupt Mask Restriction" from the NEC docs.  Hence this code
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        in this file:
209
        // *******************FIXME
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        // This causes an interrupt loop from the UART as soon as you do IO.
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        //    *S_IMR |= S_ISR_UARTIS; // unmask UART
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        // *******************NB we mask it here so that the status is in control
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        // *******************   of the application code whatever RedBoot does.
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            *S_IMR &=~S_ISR_UARTIS;
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        // *******************FIXME
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217
        * src/hal_diag.c (cyg_hal_plf_serial_isr): This now contains all
218
        it should need to.
219
        (cyg_hal_plf_serial_control): Ditto, all cases now supported.
220
 
221
        CYGHWR_HAL_GDB_PORT_VECTOR use now unconditional, other tidyups.
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        Bugfix to interrupt ack in nonblocking read, it was after the
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        return.
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225
        * cdl/hal_mips_upd985xx.cdl: We want to support ^Cm, so do not
226
        implement CYGINT_HAL_DEBUG_GDB_CTRLC_UNSUPPORTED.
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228
        * include/var_intr.h (HAL_READ_INTR_REGS): New macro, handy for
229
        debugging MIPS.  Also remove duplicate hal_ctrlc_isr/HAL_CTRLC_ISR
230
        stuff that fought with the common HAL, just leaving
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        CYGHWR_HAL_GDB_PORT_VECTOR defined.
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        * src/var_stub.c (hal_var_stub_init): Use symbols for entries in
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        vector tables and the like.
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236
2001-06-22  Hugo Tyson  
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238
        * include/variant.inc: Use the proper target-agnostic config
239
        include CYGBLD_HAL_PLATFORM_H, and do not initialize the memory
240
        controller if you're told not to by the platform configuration
241
        CYGBLD_HAL_STARTUP_ROM_POST_OMIT_INITIALIZATION.
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243
2001-06-22  Hugo Tyson  
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245
        * src/var_misc.c (hal_variant_init): Enable write-access to the
246
        flash area, and power-up the programming voltage via GPIO0, so
247
        that flash drivers can work.  Also enable the IBUS Arbiter so that
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        internal peripherals can work.
249
 
250
        * src/variant.S (hal_memc_setup): Remove hal_memc_setup for RAM
251
        start; the work is done elsewhere.
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253
        * include/variant.inc (hal_memc_init): Don't call hal_memc_setup
254
        for RAM start.
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256
2001-06-07  Hugo Tyson  
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258
        * include/variant.inc (hal_memc_init): Always do the memc call
259
        even in RAM start, to enable...
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261
        * src/variant.S (hal_memc_setup): Enable write-access to the flash
262
        area so that flash drivers can work.
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264
2001-06-06  Hugo Tyson  
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266
        * include/var_cache.h (HAL_DCACHE_ENABLE_DEFINED): Add enough NOPs
267
        after diddling the cache-enability that it works.  Also give
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        correct (apparantly!) figures for cache size despite the
269
        documentation arguing with itself.
270
 
271
        * src/var_misc.c (hal_variant_init): Enable the caches during
272
        startup.
273
 
274
        * include/var_arch.h: Add a very few definitions for use by
275
        assembler code here, and tidy up a little so that it can be used
276
        from .S files.  Specifically this is to let us init the RAM and
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        ROM access controllers from assembly.
278
 
279
        * src/variant.S:
280
        * include/variant.inc: Cut out some stuff we don't need that I had
281
        blindly copied from another platform.  Specifically we don't need
282
        to set up the TLB *at all* because all its space are belong, um,
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        all memory, IO and devices are accessible through kseg1 and kseg0.
284
        Added initial (untested) cut at setup of RAM/ROM controllers.
285
 
286
2001-06-06  Hugo Tyson  
287
 
288
        * cdl/hal_mips_upd985xx.cdl: Add implements statement for
289
        CYGINT_HAL_DEBUG_GDB_STUBS_BREAK, moved from the platform HAL.
290
 
291
2001-06-05  Hugo Tyson  
292
 
293
        * include/variant.inc: It all works rather better now...  fiddling
294
        with vector setup and cache initialization.
295
 
296
2001-06-05  Hugo Tyson  
297
 
298
        * cdl/hal_mips_upd985xx.cdl: to make GDB stubs work, implements
299
        CYGINT_HAL_MIPS_STUB_REPRESENT_32BIT_AS_64BIT.  Commented out
300
        implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT_NOT_GUARANTEED.
301
 
302
        * include/hal_diag.h: Now it works, properly be dependent on
303
        CYGSEM_HAL_VIRTUAL_VECTOR_DIAG.
304
 
305
        * include/plf_stub.h: Choose the right init routine dependent on
306
        CYGSEM_HAL_VIRTUAL_VECTOR_DIAG.
307
 
308
        * src/hal_diag.c (hal_uart_init): Remove diagnostics and delays
309
        from initialization.
310
 
311
        * src/var_stub.c (hal_var_stub_init): Remove bogus definition of
312
        vsr_table and leave breakpoint VSR alone, the springboard will
313
        handle it AOK.
314
 
315
2001-06-04  Hugo Tyson  
316
 
317
        * cdl/hal_mips_upd985xx.cdl
318
        * include/hal_diag.h
319
        * include/plf_stub.h
320
        * include/var_arch.h
321
        * include/var_cache.h
322
        * include/var_intr.h
323
        * include/variant.inc
324
        * src/hal_diag.c
325
        * src/hal_mips_upd985xx.ld
326
        * src/var_misc.c
327
        * src/var_stub.c
328
        * src/variant.S
329
        New files; initial checkin.
330
 
331
        RAM startup works; kernel tests run, loaded via SRecords,
332
        including tm_basic, clockcnv, mutex3 and the exception tests.
333
        Virtual vector calling works, but all apps do not work with a ROM
334
        monitor, so they are all standalone.  Diag printf et all all work.
335
        Floating point emulation works.
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//===========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
352
// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
356
// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//===========================================================================

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