OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [mips/] [upd985xx/] [v2_0/] [src/] [hal_mips_upd985xx.ld] - Blame information for rev 587

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
//===========================================================================
2
//
3
// MLT linker script for NEC MIPS uPD985xx
4
//
5
//===========================================================================
6
//####ECOSGPLCOPYRIGHTBEGIN####
7
// -------------------------------------------
8
// This file is part of eCos, the Embedded Configurable Operating System.
9
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
10
//
11
// eCos is free software; you can redistribute it and/or modify it under
12
// the terms of the GNU General Public License as published by the Free
13
// Software Foundation; either version 2 or (at your option) any later version.
14
//
15
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
16
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
17
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
18
// for more details.
19
//
20
// You should have received a copy of the GNU General Public License along
21
// with eCos; if not, write to the Free Software Foundation, Inc.,
22
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
23
//
24
// As a special exception, if other files instantiate templates or use macros
25
// or inline functions from this file, or you compile this file and link it
26
// with other works to produce a work based on this file, this file does not
27
// by itself cause the resulting work to be covered by the GNU General Public
28
// License. However the source code for this file must still be made available
29
// in accordance with section (3) of the GNU General Public License.
30
//
31
// This exception does not invalidate any other reasons why a work based on
32
// this file might be covered by the GNU General Public License.
33
//
34
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
35
// at http://sources.redhat.com/ecos/ecos-license/
36
// -------------------------------------------
37
//####ECOSGPLCOPYRIGHTEND####
38
//===========================================================================
39
 
40
#include 
41
 
42
STARTUP(vectors.o)
43
ENTRY(reset_vector)
44
OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-littlemips")
45
#ifdef EXTRAS
46
INPUT(extras.o)
47
#endif
48
#if (__GNUC__ >= 3)
49
GROUP(libtarget.a libgcc.a libsupc++.a)
50
#else
51
GROUP(libtarget.a libgcc.a)
52
#endif
53
 
54
#define ALIGN_LMA 8
55
#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1))
56
#define LMA_EQ_VMA
57
#define FORCE_OUTPUT . = .
58
 
59
#define SECTIONS_BEGIN
60
 
61
#if defined(CYG_HAL_STARTUP_RAM)
62
 
63
/* this version for RAM startup */
64
#define SECTION_rom_vectors(_region_, _vma_, _lma_) \
65
    .rom_vectors _vma_ : _lma_ \
66
    { KEEP (*(.utlb_vector)) \
67
    . = ALIGN(0x80); KEEP(*(.other_vector)) \
68
        /* debug and reset vector not used in RAM version */ \
69
        KEEP (*(.reset_vector)) } \
70
    > _region_
71
 
72
#elif defined(CYG_HAL_STARTUP_ROM)
73
 
74
/* this version for ROM startup */
75
#define SECTION_rom_vectors(_region_, _vma_, _lma_) \
76
    .rom_vectors _vma_ : _lma_ \
77
    { KEEP (*(.reset_vector)) \
78
    . = ALIGN(0x100); KEEP (*(.utlb_vector)) \
79
    . = ALIGN(0x80); KEEP(*(.other_vector)) \
80
    } > _region_
81
 
82
#elif defined(CYG_HAL_STARTUP_ROMRAM)
83
 
84
/* this version for ROMRAM startup.  These are actually a           */
85
/* combination of the ROM and RAM vector locations since the code   */
86
/* starts off in ROM and transfers to RAM during startup.           */
87
#define SECTION_rom_vectors(_region_, _vma_, _lma_)     \
88
    .rom_vectors _vma_ : _lma_                          \
89
    {                                                   \
90
        KEEP (*(.reset_vector))                         \
91
        . = ALIGN(0x100);                               \
92
        KEEP (*(.utlb_vector))                          \
93
        . = ALIGN(0x80);                                \
94
        KEEP(*(.other_vector))                          \
95
        . = ALIGN(0x800);                               \
96
    } > _region_ =0
97
 
98
#endif /* ROMRAM startup version of ROM vectors */
99
 
100
#define SECTION_text(_region_, _vma_, _lma_) \
101
    .text _vma_ : _lma_ \
102
    { _stext = ABSOLUTE(.); \
103
    *(.text*) *(.gnu.warning) *(.gnu.linkonce*) *(.init) } \
104
    > _region_ \
105
    _etext = .; PROVIDE (etext = .);
106
 
107
#define SECTION_fini(_region_, _vma_, _lma_) \
108
    .fini _vma_ : _lma_ \
109
    { FORCE_OUTPUT; *(.fini) } \
110
    > _region_
111
 
112
#define SECTION_ctors(_region_, _vma_, _lma_)   \
113
   .ctors _vma_ : _lma_                         \
114
   {                                            \
115
     __CTOR_LIST__ = ABSOLUTE (.);              \
116
     KEEP(*(.ctors))                            \
117
     KEEP(*(SORT(.ctors.*)))                    \
118
     __CTOR_END__ = ABSOLUTE (.);               \
119
   } > _region_
120
 
121
#define SECTION_dtors(_region_, _vma_, _lma_)   \
122
   .dtors _vma_ : _lma_                         \
123
   {                                            \
124
     __DTOR_LIST__ = ABSOLUTE (.);              \
125
     KEEP(*(SORT(.dtors.*)))                    \
126
     KEEP(*(.dtors))                            \
127
     __DTOR_END__ = ABSOLUTE (.);               \
128
   } > _region_
129
 
130
#define SECTION_rodata(_region_, _vma_, _lma_)  \
131
    .rodata _vma_ : _lma_                       \
132
    { FORCE_OUTPUT; *(.rodata*) }               \
133
    > _region_
134
 
135
#define SECTION_vsr_table(_region_, _vma_, _lma_) \
136
    .vsr_table _vma_ : _lma_ \
137
    { FORCE_OUTPUT; *(.vsr_table) } \
138
    > _region_
139
 
140
#define SECTION_rodata1(_region_, _vma_, _lma_) \
141
    .rodata1 _vma_ : _lma_ \
142
    { FORCE_OUTPUT; *(.rodata1) } \
143
    > _region_
144
 
145
#define SECTION_fixup(_region_, _vma_, _lma_) \
146
    .fixup _vma_ : _lma_ \
147
    { FORCE_OUTPUT; *(.fixup) } \
148
    > _region_
149
 
150
#define SECTION_rel__dyn(_region_, _vma_, _lma_) \
151
    .rel.dyn _vma_ : _lma_ \
152
    { FORCE_OUTPUT; *(.rel.dyn) } \
153
    > _region_
154
 
155
#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \
156
    .gcc_except_table _vma_ : _lma_ \
157
    { FORCE_OUTPUT; *(.gcc_except_table) } \
158
    > _region_
159
 
160
#define SECTION_data(_region_, _vma_, _lma_) \
161
    .data _vma_ : _lma_ \
162
    { __ram_data_start = ABSOLUTE (.); \
163
    *(.data*) *(.data1) \
164
    _GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \
165
    _GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \
166
    . = ALIGN (8); \
167
    KEEP(*( SORT (.ecos.table.*))) ;            \
168
    . = ALIGN (8); \
169
    _GOT_START = ABSOLUTE (.); _gp = ABSOLUTE (.); __global = _gp; _GLOBAL_OFFSET_TABLE_ = ABSOLUTE (.); _SDA_BASE_ = ABSOLUTE (.); \
170
    *(.got.plt) *(.got) _GOT_END_ = ABSOLUTE (.); \
171
    *(.dynamic) *(.lit8) *(.lit4) *(.sdata*) *(.sbss*) *(.eh_frame) } \
172
    > _region_ \
173
    __rom_data_start = LOADADDR (.data); \
174
    __ram_data_end = .; PROVIDE (__ram_data_end = .); _edata = .; PROVIDE (edata = .);
175
 
176
#define SECTION_bss(_region_, _vma_, _lma_) \
177
    .bss _vma_ : _lma_ \
178
    { __bss_start = ABSOLUTE (.); \
179
    *(.scommon) *(.dynbss) *(.bss) *(COMMON) \
180
    __bss_end = ABSOLUTE (.); } \
181
    > _region_
182
 
183
#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \
184
    .debug           0 : { *(.debug) } \
185
    .line            0 : { *(.line) } \
186
    .debug_srcinfo   0 : { *(.debug_srcinfo) } \
187
    .debug_sfnames   0 : { *(.debug_sfnames) } \
188
    .debug_aranges   0 : { *(.debug_aranges) } \
189
    .debug_pubnames  0 : { *(.debug_pubnames) } \
190
    .debug_info      0 : { *(.debug_info) } \
191
    .debug_abbrev    0 : { *(.debug_abbrev) } \
192
    .debug_line      0 : { *(.debug_line) } \
193
    .debug_frame     0 : { *(.debug_frame) } \
194
    .debug_str       0 : { *(.debug_str) } \
195
    .debug_loc       0 : { *(.debug_loc) } \
196
    .debug_macinfo   0 : { *(.debug_macinfo) } \
197
    .debug_weaknames 0 : { *(.debug_weaknames) } \
198
    .debug_funcnames 0 : { *(.debug_funcnames) } \
199
    .debug_typenames 0 : { *(.debug_typenames) } \
200
    .debug_varnames  0 : { *(.debug_varnames) } \
201
    /DISCARD/          : { *(.debug_vector) }
202
 
203
#include CYGHWR_MEMORY_LAYOUT_LDI
204
 
205
hal_vsr_table = 0x80000400;
206
hal_interrupt_sr_mask_shadow_base = 0x80000500;
207
hal_virtual_vector_table = 0x80000600;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.