| 1 |
27 |
unneback |
#ifndef CYGONCE_VAR_CACHE_H
|
| 2 |
|
|
#define CYGONCE_VAR_CACHE_H
|
| 3 |
|
|
|
| 4 |
|
|
//=============================================================================
|
| 5 |
|
|
//
|
| 6 |
|
|
// var_cache.h
|
| 7 |
|
|
//
|
| 8 |
|
|
// HAL cache control API
|
| 9 |
|
|
//
|
| 10 |
|
|
//=============================================================================
|
| 11 |
|
|
//####ECOSGPLCOPYRIGHTBEGIN####
|
| 12 |
|
|
// -------------------------------------------
|
| 13 |
|
|
// This file is part of eCos, the Embedded Configurable Operating System.
|
| 14 |
|
|
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
|
| 15 |
|
|
//
|
| 16 |
|
|
// eCos is free software; you can redistribute it and/or modify it under
|
| 17 |
|
|
// the terms of the GNU General Public License as published by the Free
|
| 18 |
|
|
// Software Foundation; either version 2 or (at your option) any later version.
|
| 19 |
|
|
//
|
| 20 |
|
|
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
|
| 21 |
|
|
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
| 22 |
|
|
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
| 23 |
|
|
// for more details.
|
| 24 |
|
|
//
|
| 25 |
|
|
// You should have received a copy of the GNU General Public License along
|
| 26 |
|
|
// with eCos; if not, write to the Free Software Foundation, Inc.,
|
| 27 |
|
|
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
|
| 28 |
|
|
//
|
| 29 |
|
|
// As a special exception, if other files instantiate templates or use macros
|
| 30 |
|
|
// or inline functions from this file, or you compile this file and link it
|
| 31 |
|
|
// with other works to produce a work based on this file, this file does not
|
| 32 |
|
|
// by itself cause the resulting work to be covered by the GNU General Public
|
| 33 |
|
|
// License. However the source code for this file must still be made available
|
| 34 |
|
|
// in accordance with section (3) of the GNU General Public License.
|
| 35 |
|
|
//
|
| 36 |
|
|
// This exception does not invalidate any other reasons why a work based on
|
| 37 |
|
|
// this file might be covered by the GNU General Public License.
|
| 38 |
|
|
//
|
| 39 |
|
|
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
|
| 40 |
|
|
// at http://sources.redhat.com/ecos/ecos-license/
|
| 41 |
|
|
// -------------------------------------------
|
| 42 |
|
|
//####ECOSGPLCOPYRIGHTEND####
|
| 43 |
|
|
//=============================================================================
|
| 44 |
|
|
//#####DESCRIPTIONBEGIN####
|
| 45 |
|
|
//
|
| 46 |
|
|
// Author(s): nickg
|
| 47 |
|
|
// Contributors: nickg
|
| 48 |
|
|
// Date: 1998-02-17
|
| 49 |
|
|
// Purpose: Cache control API
|
| 50 |
|
|
// Description: The macros defined here provide the HAL APIs for handling
|
| 51 |
|
|
// cache control operations.
|
| 52 |
|
|
// Usage:
|
| 53 |
|
|
// #include <cyg/hal/var_cache.h>
|
| 54 |
|
|
// ...
|
| 55 |
|
|
//
|
| 56 |
|
|
//
|
| 57 |
|
|
//####DESCRIPTIONEND####
|
| 58 |
|
|
//
|
| 59 |
|
|
//=============================================================================
|
| 60 |
|
|
|
| 61 |
|
|
#include <pkgconf/hal.h>
|
| 62 |
|
|
#include <cyg/infra/cyg_type.h>
|
| 63 |
|
|
|
| 64 |
|
|
#include <cyg/hal/plf_cache.h>
|
| 65 |
|
|
|
| 66 |
|
|
//-----------------------------------------------------------------------------
|
| 67 |
|
|
// Cache sizes.
|
| 68 |
|
|
|
| 69 |
|
|
// Data cache
|
| 70 |
|
|
#define HAL_DCACHE_SIZE (8*1024) // Size of data cache in bytes
|
| 71 |
|
|
#define HAL_DCACHE_LINE_SIZE 16 // Size of a data cache line
|
| 72 |
|
|
#define HAL_DCACHE_WAYS 1 // Associativity of the cache
|
| 73 |
|
|
|
| 74 |
|
|
// Instruction cache
|
| 75 |
|
|
#define HAL_ICACHE_SIZE (16*1024) // Size of cache in bytes
|
| 76 |
|
|
#define HAL_ICACHE_LINE_SIZE 32 // Size of a cache line
|
| 77 |
|
|
#define HAL_ICACHE_WAYS 1 // Associativity of the cache
|
| 78 |
|
|
|
| 79 |
|
|
#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS))
|
| 80 |
|
|
#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS))
|
| 81 |
|
|
|
| 82 |
|
|
//-----------------------------------------------------------------------------
|
| 83 |
|
|
// The VR4300 mostly uses the default MIPS cache controls defined in hal_cache.h
|
| 84 |
|
|
// Here we define the cache enable and disable macros. The only control we appear
|
| 85 |
|
|
// to have is the kseg0 cache state in config0. So all these macros at present
|
| 86 |
|
|
// manipulate this.
|
| 87 |
|
|
|
| 88 |
|
|
#ifndef HAL_DCACHE_ENABLE_DEFINED
|
| 89 |
|
|
#define HAL_DCACHE_ENABLE() \
|
| 90 |
|
|
CYG_MACRO_START \
|
| 91 |
|
|
asm volatile ( "mfc0 $2,$16\n" \
|
| 92 |
|
|
"nop; nop; nop\n" \
|
| 93 |
|
|
"la $3,0xFFFFFFF8\n" \
|
| 94 |
|
|
"and $2,$2,$3\n" \
|
| 95 |
|
|
"ori $2,$2,3\n" \
|
| 96 |
|
|
"mtc0 $2,$16\n" \
|
| 97 |
|
|
"nop; nop; nop;\n" \
|
| 98 |
|
|
: \
|
| 99 |
|
|
: \
|
| 100 |
|
|
: "$2", "$3" \
|
| 101 |
|
|
); \
|
| 102 |
|
|
CYG_MACRO_END
|
| 103 |
|
|
#define HAL_DCACHE_ENABLE_DEFINED
|
| 104 |
|
|
#endif
|
| 105 |
|
|
|
| 106 |
|
|
// Disable the data cache
|
| 107 |
|
|
#ifndef HAL_DCACHE_DISABLE_DEFINED
|
| 108 |
|
|
#define HAL_DCACHE_DISABLE() \
|
| 109 |
|
|
CYG_MACRO_START \
|
| 110 |
|
|
asm volatile ( "mfc0 $2,$16\n" \
|
| 111 |
|
|
"nop; nop; nop\n" \
|
| 112 |
|
|
"la $3,0xFFFFFFF8\n" \
|
| 113 |
|
|
"and $2,$2,$3\n" \
|
| 114 |
|
|
"ori $2,$2,2\n" \
|
| 115 |
|
|
"mtc0 $2,$16\n" \
|
| 116 |
|
|
"nop; nop; nop;\n" \
|
| 117 |
|
|
: \
|
| 118 |
|
|
: \
|
| 119 |
|
|
: "$2", "$3" \
|
| 120 |
|
|
); \
|
| 121 |
|
|
CYG_MACRO_END
|
| 122 |
|
|
#define HAL_DCACHE_DISABLE_DEFINED
|
| 123 |
|
|
#endif
|
| 124 |
|
|
|
| 125 |
|
|
#ifndef HAL_DCACHE_IS_ENABLED_DEFINED
|
| 126 |
|
|
#define HAL_DCACHE_IS_ENABLED(_state_) \
|
| 127 |
|
|
CYG_MACRO_START \
|
| 128 |
|
|
CYG_WORD32 _cstate_; \
|
| 129 |
|
|
asm volatile ( "mfc0 %0,$16\n" \
|
| 130 |
|
|
: "=r"(_cstate_) \
|
| 131 |
|
|
); \
|
| 132 |
|
|
if( (_cstate_ & 7) == 2 ) _state_ = 0; \
|
| 133 |
|
|
else _state_ = 1; \
|
| 134 |
|
|
CYG_MACRO_END
|
| 135 |
|
|
#define HAL_DCACHE_IS_ENABLED_DEFINED
|
| 136 |
|
|
#endif
|
| 137 |
|
|
|
| 138 |
|
|
#ifndef HAL_ICACHE_ENABLE_DEFINED
|
| 139 |
|
|
#define HAL_ICACHE_ENABLE() HAL_DCACHE_ENABLE()
|
| 140 |
|
|
#define HAL_ICACHE_ENABLE_DEFINED
|
| 141 |
|
|
#endif
|
| 142 |
|
|
|
| 143 |
|
|
// Disable the instruction cache
|
| 144 |
|
|
#ifndef HAL_ICACHE_DISABLE_DEFINED
|
| 145 |
|
|
#define HAL_ICACHE_DISABLE() HAL_DCACHE_DISABLE()
|
| 146 |
|
|
#define HAL_ICACHE_DISABLE_DEFINED
|
| 147 |
|
|
#endif
|
| 148 |
|
|
|
| 149 |
|
|
#ifndef HAL_ICACHE_IS_ENABLED_DEFINED
|
| 150 |
|
|
#define HAL_ICACHE_IS_ENABLED(_state_) HAL_DCACHE_IS_ENABLED(_state_)
|
| 151 |
|
|
#define HAL_ICACHE_IS_ENABLED_DEFINED
|
| 152 |
|
|
#endif
|
| 153 |
|
|
|
| 154 |
|
|
//-----------------------------------------------------------------------------
|
| 155 |
|
|
// The VR4300 has no cache locking facility so we define the guard macros
|
| 156 |
|
|
// to disable the definitions in hal_arch.h.
|
| 157 |
|
|
|
| 158 |
|
|
#define HAL_DCACHE_LOCK_DEFINED
|
| 159 |
|
|
#define HAL_DCACHE_UNLOCK_DEFINED
|
| 160 |
|
|
#define HAL_DCACHE_UNLOCK_ALL_DEFINED
|
| 161 |
|
|
|
| 162 |
|
|
#define HAL_ICACHE_LOCK_DEFINED
|
| 163 |
|
|
#define HAL_ICACHE_UNLOCK_DEFINED
|
| 164 |
|
|
|
| 165 |
|
|
//-----------------------------------------------------------------------------
|
| 166 |
|
|
#endif // ifndef CYGONCE_VAR_CACHE_H
|
| 167 |
|
|
// End of var_cache.h
|
