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//========================================================================
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//
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// pmon.S
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//
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// Low-level entry points into PMON monitor.
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//
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//========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): Red Hat, nickg
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// Contributors: Red Hat, nickg
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// Date: 1999-04-21
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// Purpose:
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// Description: Low-level entry points into PMON monitor.
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// Usage:
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//
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//####DESCRIPTIONEND####
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//
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//========================================================================
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#ifdef __mips16
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/* This file contains 32 bit assembly code. */
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.set nomips16
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#endif
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#if __mips < 3
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/* This machine does not support 64-bit operations. */
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#define ADDU addu
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#define SUBU subu
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#else
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/* This machine supports 64-bit operations. */
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#define ADDU daddu
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#define SUBU dsubu
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#endif
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/* Standard MIPS register names: */
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#define zero $0
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#define z0 $0
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#define v0 $2
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#define v1 $3
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#define a0 $4
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#define a1 $5
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#define a2 $6
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#define a3 $7
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#define t0 $8
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#define t1 $9
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#define t2 $10
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#define t3 $11
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#define t4 $12
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#define t5 $13
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#define t6 $14
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#define t7 $15
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#define s0 $16
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#define s1 $17
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#define s2 $18
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#define s3 $19
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#define s4 $20
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#define s5 $21
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#define s6 $22
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#define s7 $23
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#define t8 $24
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#define t9 $25
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#define k0 $26 /* kernel private register 0 */
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#define k1 $27 /* kernel private register 1 */
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#define gp $28 /* global data pointer */
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#define sp $29 /* stack-pointer */
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#define fp $30 /* frame-pointer */
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#define ra $31 /* return address */
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#define pc $pc /* pc, used on mips16 */
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#define fp0 $f0
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#define fp1 $f1
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/* Useful memory constants: */
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#define K0BASE 0x80000000
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#ifndef __mips64
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#define K1BASE 0xA0000000
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#else
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#define K1BASE 0xFFFFFFFFA0000000LL
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#endif
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#define PHYS_TO_K1(a) ((unsigned)(a) | K1BASE)
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/* Standard Co-Processor 0 register numbers: */
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#define C0_COUNT $9 /* Count Register */
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#define C0_SR $12 /* Status Register */
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#define C0_CAUSE $13 /* last exception description */
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#define C0_EPC $14 /* Exception error address */
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#define C0_CONFIG $16 /* CPU configuration */
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/* Standard Status Register bitmasks: */
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#define SR_CU1 0x20000000 /* Mark CP1 as usable */
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#define SR_FR 0x04000000 /* Enable MIPS III FP registers */
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#define SR_BEV 0x00400000 /* Controls location of exception vectors */
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#define SR_PE 0x00100000 /* Mark soft reset (clear parity error) */
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#define SR_KX 0x00000080 /* Kernel extended addressing enabled */
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#define SR_SX 0x00000040 /* Supervisor extended addressing enabled */
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#define SR_UX 0x00000020 /* User extended addressing enabled */
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/* Standard (R4000) cache operations. Taken from "MIPS R4000
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Microprocessor User's Manual" 2nd edition: */
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#define CACHE_I (0) /* primary instruction */
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#define CACHE_D (1) /* primary data */
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#define CACHE_SI (2) /* secondary instruction */
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#define CACHE_SD (3) /* secondary data (or combined instruction/data) */
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#define INDEX_INVALIDATE (0) /* also encodes WRITEBACK if CACHE_D or CACHE_SD */
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#define INDEX_LOAD_TAG (1)
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#define INDEX_STORE_TAG (2)
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#define CREATE_DIRTY_EXCLUSIVE (3) /* CACHE_D and CACHE_SD only */
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#define HIT_INVALIDATE (4)
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#define CACHE_FILL (5) /* CACHE_I only */
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#define HIT_WRITEBACK_INVALIDATE (5) /* CACHE_D and CACHE_SD only */
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#define HIT_WRITEBACK (6) /* CACHE_I, CACHE_D and CACHE_SD only */
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#define HIT_SET_VIRTUAL (7) /* CACHE_SI and CACHE_SD only */
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#define BUILD_CACHE_OP(o,c) (((o) << 2) | (c))
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/* Individual cache operations: */
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#define INDEX_INVALIDATE_I BUILD_CACHE_OP(INDEX_INVALIDATE,CACHE_I)
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#define INDEX_WRITEBACK_INVALIDATE_D BUILD_CACHE_OP(INDEX_INVALIDATE,CACHE_D)
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#define INDEX_INVALIDATE_SI BUILD_CACHE_OP(INDEX_INVALIDATE,CACHE_SI)
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#define INDEX_WRITEBACK_INVALIDATE_SD BUILD_CACHE_OP(INDEX_INVALIDATE,CACHE_SD)
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#define INDEX_LOAD_TAG_I BUILD_CACHE_OP(INDEX_LOAD_TAG,CACHE_I)
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#define INDEX_LOAD_TAG_D BUILD_CACHE_OP(INDEX_LOAD_TAG,CACHE_D)
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#define INDEX_LOAD_TAG_SI BUILD_CACHE_OP(INDEX_LOAD_TAG,CACHE_SI)
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#define INDEX_LOAD_TAG_SD BUILD_CACHE_OP(INDEX_LOAD_TAG,CACHE_SD)
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#define INDEX_STORE_TAG_I BUILD_CACHE_OP(INDEX_STORE_TAG,CACHE_I)
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#define INDEX_STORE_TAG_D BUILD_CACHE_OP(INDEX_STORE_TAG,CACHE_D)
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#define INDEX_STORE_TAG_SI BUILD_CACHE_OP(INDEX_STORE_TAG,CACHE_SI)
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#define INDEX_STORE_TAG_SD BUILD_CACHE_OP(INDEX_STORE_TAG,CACHE_SD)
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#define CREATE_DIRTY_EXCLUSIVE_D BUILD_CACHE_OP(CREATE_DIRTY_EXCLUSIVE,CACHE_D)
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#define CREATE_DIRTY_EXCLUSIVE_SD BUILD_CACHE_OP(CREATE_DIRTY_EXCLUSIVE,CACHE_SD)
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#define HIT_INVALIDATE_I BUILD_CACHE_OP(HIT_INVALIDATE,CACHE_I)
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#define HIT_INVALIDATE_D BUILD_CACHE_OP(HIT_INVALIDATE,CACHE_D)
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#define HIT_INVALIDATE_SI BUILD_CACHE_OP(HIT_INVALIDATE,CACHE_SI)
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#define HIT_INVALIDATE_SD BUILD_CACHE_OP(HIT_INVALIDATE,CACHE_SD)
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#define CACHE_FILL_I BUILD_CACHE_OP(CACHE_FILL,CACHE_I)
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#define HIT_WRITEBACK_INVALIDATE_D BUILD_CACHE_OP(HIT_WRITEBACK_INVALIDATE,CACHE_D)
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#define HIT_WRITEBACK_INVALIDATE_SD BUILD_CACHE_OP(HIT_WRITEBACK_INVALIDATE,CACHE_SD)
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#define HIT_WRITEBACK_I BUILD_CACHE_OP(HIT_WRITEBACK,CACHE_I)
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#define HIT_WRITEBACK_D BUILD_CACHE_OP(HIT_WRITEBACK,CACHE_D)
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#define HIT_WRITEBACK_SD BUILD_CACHE_OP(HIT_WRITEBACK,CACHE_SD)
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#define HIT_SET_VIRTUAL_SI BUILD_CACHE_OP(HIT_SET_VIRTUAL,CACHE_SI)
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#define HIT_SET_VIRTUAL_SD BUILD_CACHE_OP(HIT_SET_VIRTUAL,CACHE_SD)
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.text
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.align 2
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#ifdef LSI
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#define PMON_VECTOR 0xffffffffbfc00200
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#else
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#define PMON_VECTOR 0xffffffffbfc00500
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#endif
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#ifndef __mips_eabi
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/* Provide named functions for entry into the monitor: */
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#define INDIRECT(name,index) \
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.globl name; \
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.ent name; \
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.set noreorder; \
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name: la $2,+(PMON_VECTOR+((index)*4)); \
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lw $2,0($2); \
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j $2; \
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nop; \
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.set reorder; \
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.end name
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#else
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#define INDIRECT(name,index) \
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.globl name; \
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.ent name; \
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.set noreorder; \
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name: la $2,+(PMON_VECTOR+((index)*4)); \
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lw $2,0($2); \
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SUBU sp,sp,0x40; \
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sd ra,0x38(sp); \
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sd fp,0x30(sp); \
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jal $2; \
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move fp,sp; \
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ld ra,0x38(sp); \
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ld fp,0x30(sp); \
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j ra; \
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ADDU sp,sp,0x40; \
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.set reorder; \
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.end name
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#endif
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/* The following magic numbers are for the slots into the PMON monitor */
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/* The first are used as the lo-level library run-time: */
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INDIRECT(pmon_read,0)
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INDIRECT(pmon_write,1)
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INDIRECT(pmon_open,2)
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INDIRECT(pmon_close,3)
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/* The following are useful monitor routines: */
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INDIRECT(pmon_ioctl,4)
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INDIRECT(pmon_printf,5)
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INDIRECT(pmon_vsprintf,6)
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INDIRECT(pmon_ttctl,7)
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INDIRECT(pmon_cliexit,8)
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INDIRECT(pmon_getenv,9)
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INDIRECT(pmon_onintr,10)
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INDIRECT(pmon_flush_cache,11)
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INDIRECT(pmon_exception,12)
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/* The following routine is required by the "print()" function: */
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.globl pmon_outbyte
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.ent pmon_outbyte
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.set noreorder
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pmon_outbyte:
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subu sp,sp,0x20 /* allocate stack space for string */
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sd ra,0x18(sp) /* stack return address */
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sd fp,0x10(sp) /* stack frame-pointer */
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move fp,sp /* take a copy of the stack pointer */
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/* We leave so much space on the stack for the string (16
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characters), since the call to mon_printf seems to corrupt
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the 8bytes at offset 8 into the string/stack. */
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sb a0,0x00(sp) /* character to print */
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sb z0,0x01(sp) /* NUL terminator */
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jal pmon_printf /* and output the string */
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move a0,sp /* take a copy of the string pointer {DELAY SLOT} */
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move sp,fp /* recover stack pointer */
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ld ra,0x18(sp) /* recover return address */
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ld fp,0x10(sp) /* recover frame-pointer */
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j ra /* return to the caller */
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addu sp,sp,0x20 /* dump the stack space {DELAY SLOT} */
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.set reorder
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.end pmon_outbyte
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/* EOF pmon.S */
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