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#ifndef CYGONCE_HAL_VAR_ARCH_H
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#define CYGONCE_HAL_VAR_ARCH_H
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//==========================================================================
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//
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// var_arch.h
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//
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// Architecture specific abstractions
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): nickg
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// Contributors: nickg, dmoseley
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// Date: 1999-02-17
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// Purpose: Define architecture abstractions
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// Description: This file contains any extra or modified definitions for
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// this variant of the architecture.
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// Usage: #include <cyg/hal/var_arch.h>
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <pkgconf/hal.h>
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#include <cyg/infra/cyg_type.h>
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//--------------------------------------------------------------------------
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// Processor Status word bitmasks
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#define HAL_ARCH_AM33_PSW_nSL (1L << 16)
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#define HAL_ARCH_AM33_PSW_ML (1L << 19)
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#define HAL_ARCH_AM33_PSW_FE (1L << 20)
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//--------------------------------------------------------------------------
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// Processor saved states:
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typedef struct HAL_SavedRegisters
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{
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// These are common to all saved states and are in the order
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// stored and loaded by the movm instruction.
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CYG_ADDRWORD vector; /* Vector number/dummy */
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CYG_ADDRWORD lar; /* Loop address register */
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CYG_ADDRWORD lir; /* Loop instruction register */
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CYG_ADDRWORD mdr; /* Multiply/Divide register */
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CYG_ADDRWORD a1;
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CYG_ADDRWORD a0;
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CYG_ADDRWORD d1;
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CYG_ADDRWORD d0;
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CYG_ADDRWORD a3;
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CYG_ADDRWORD a2;
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CYG_ADDRWORD d3;
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CYG_ADDRWORD d2;
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CYG_ADDRWORD mcvf; /* MAC overflow flag */
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CYG_ADDRWORD mcrl; /* MAC register low */
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CYG_ADDRWORD mcrh; /* MAC register high */
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CYG_ADDRWORD mdrq; /* Fast multiply/divide register*/
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CYG_ADDRWORD e1; /* extended registers */
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CYG_ADDRWORD e0;
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CYG_ADDRWORD e7;
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CYG_ADDRWORD e6;
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CYG_ADDRWORD e5;
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CYG_ADDRWORD e4;
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CYG_ADDRWORD e3;
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CYG_ADDRWORD e2;
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/* On interrupts the PC and PSW are pushed automatically by the */
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/* CPU and SP is pushed for debugging reasons. On a thread switch */
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/* the saved context is made to look the same. */
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CYG_ADDRWORD sp; /* Saved copy of SP in some states */
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CYG_ADDRWORD psw; /* Status word */
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CYG_ADDRWORD pc; /* Program Counter */
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} HAL_SavedRegisters;
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//--------------------------------------------------------------------------
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// Extra initialization for AM33 extended register set.
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#define HAL_THREAD_INIT_CONTEXT_EXTRA(_regs_, _id_) \
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CYG_MACRO_START \
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(_regs_)->e0 = (_id_)|0xeee0; \
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(_regs_)->e1 = (_id_)|0xeee1; \
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(_regs_)->e2 = (_id_)|0xeee2; \
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(_regs_)->e3 = (_id_)|0xeee3; \
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(_regs_)->e4 = (_id_)|0xeee4; \
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(_regs_)->e5 = (_id_)|0xeee5; \
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(_regs_)->e6 = (_id_)|0xeee6; \
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(_regs_)->e7 = (_id_)|0xeee7; \
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(_regs_)->mcrl = 0; \
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(_regs_)->mcrh = 0; \
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(_regs_)->mdrq = 0; \
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(_regs_)->mcvf = 0; \
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CYG_MACRO_END
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//--------------------------------------------------------------------------
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// The following macros copy the extra AM33 registers between a
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// HAL_SavedRegisters structure and a GDB register dump.
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// The CYGMON version should handle the SSP and USP and MDRQ registers.
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#ifdef CYGPKG_CYGMON
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#define HAL_GET_GDB_EXTRA_REGISTERS( _regval_, _regs_ ) am33_get_gdb_extra_registers( _regval_, _regs_ )
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extern void am33_get_gdb_extra_registers(CYG_ADDRWORD *registers, HAL_SavedRegisters *regs);
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#else // CYGPKG_CYGMON
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#define HAL_GET_GDB_EXTRA_REGISTERS( _regval_, _regs_ ) \
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CYG_MACRO_START \
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(_regval_)[15] = (_regs_)->e0; \
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(_regval_)[16] = (_regs_)->e1; \
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(_regval_)[17] = (_regs_)->e2; \
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(_regval_)[18] = (_regs_)->e3; \
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(_regval_)[19] = (_regs_)->e4; \
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(_regval_)[20] = (_regs_)->e5; \
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(_regval_)[21] = (_regs_)->e6; \
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(_regval_)[22] = (_regs_)->e7; \
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\
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(_regval_)[23] = (_regs_)->sp; \
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(_regval_)[24] = (_regs_)->sp; \
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(_regval_)[25] = (_regs_)->sp; \
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\
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(_regval_)[26] = (_regs_)->mcrh; \
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(_regval_)[27] = (_regs_)->mcrl; \
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(_regval_)[28] = (_regs_)->mcvf; \
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CYG_MACRO_END
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#endif // CYGPKG_CYGMON
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#ifdef CYGPKG_CYGMON
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#define HAL_SET_GDB_EXTRA_REGISTERS( _regval_, _regs_ ) am33_set_gdb_extra_registers( _regs_, _regval_ )
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extern void am33_set_gdb_extra_registers(CYG_ADDRWORD *registers, HAL_SavedRegisters *regs);
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#else // CYGPKG_CYGMON
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#define HAL_SET_GDB_EXTRA_REGISTERS( _regs_, _regval_ ) \
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CYG_MACRO_START \
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(_regs_)->e0 = (_regval_)[15]; \
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(_regs_)->e1 = (_regval_)[16]; \
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(_regs_)->e2 = (_regval_)[17]; \
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(_regs_)->e3 = (_regval_)[18]; \
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(_regs_)->e4 = (_regval_)[19]; \
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(_regs_)->e5 = (_regval_)[20]; \
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(_regs_)->e6 = (_regval_)[21]; \
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(_regs_)->e7 = (_regval_)[22]; \
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\
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(_regs_)->sp = (_regval_)[23]; \
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(_regs_)->sp = (_regval_)[24]; \
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(_regs_)->sp = (_regval_)[25]; \
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\
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(_regs_)->mcrh = (_regval_)[26]; \
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(_regs_)->mcrl = (_regval_)[27]; \
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(_regs_)->mcvf = (_regval_)[28]; \
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CYG_MACRO_END
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#endif // CYGPKG_CYGMON
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//--------------------------------------------------------------------------
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#endif // CYGONCE_HAL_VAR_ARCH_H
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// End of var_arch.h
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