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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [mn10300/] [arch/] [v2_0/] [include/] [arch.inc] - Blame information for rev 174

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#ifndef CYGONCE_HAL_ARCH_INC
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#define CYGONCE_HAL_ARCH_INC
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##=============================================================================
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##
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##      arch.inc
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##
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##      MN10300 assembler header file
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##
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##=============================================================================
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#####ECOSGPLCOPYRIGHTBEGIN####
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## -------------------------------------------
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## This file is part of eCos, the Embedded Configurable Operating System.
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## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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##
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## eCos is free software; you can redistribute it and/or modify it under
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## the terms of the GNU General Public License as published by the Free
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## Software Foundation; either version 2 or (at your option) any later version.
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##
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## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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## WARRANTY; without even the implied warranty of MERCHANTABILITY or
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## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License along
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## with eCos; if not, write to the Free Software Foundation, Inc.,
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## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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##
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## As a special exception, if other files instantiate templates or use macros
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## or inline functions from this file, or you compile this file and link it
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## with other works to produce a work based on this file, this file does not
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## by itself cause the resulting work to be covered by the GNU General Public
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## License. However the source code for this file must still be made available
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## in accordance with section (3) of the GNU General Public License.
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##
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## This exception does not invalidate any other reasons why a work based on
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## this file might be covered by the GNU General Public License.
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##
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## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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## at http://sources.redhat.com/ecos/ecos-license/
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## -------------------------------------------
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#####ECOSGPLCOPYRIGHTEND####
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##=============================================================================
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#######DESCRIPTIONBEGIN####
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##
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## Author(s):   nickg
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## Contributors:        nickg, dmoseley
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## Date:        1997-10-16
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## Purpose:     Architecture definitions.
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## Description: This file contains various definitions and macros that are
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##              useful for writing assembly code for the MN10300 CPU family.
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## Usage:
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##              #include 
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##              ...
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##
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##
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######DESCRIPTIONEND####
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##
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##=============================================================================
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#include 
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#include 
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##-----------------------------------------------------------------------------
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## CPU specific macros. These provide a common assembler interface to
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## operations that may have CPU specific implementations on different
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## variants of the architecture.
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#ifndef CYGPKG_HAL_MN10300_CPU_INIT_DEFINED
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        # Initialize CPU
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        .macro  hal_cpu_init
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        # Set up the PSW
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        mov     0x0700,d0
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        mov     d0,psw
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        .endm
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#endif
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        # Enable interrupts
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        .macro hal_cpu_int_enable
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        or      0x0800,psw
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        .endm
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        # Disable interrupts
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        .macro hal_cpu_int_disable
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        and     0xF7ff,psw
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        .endm
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        # Merge the interrupt enable state of the status register in
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        # \sr with the current sr.
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        .macro  hal_cpu_int_merge sr
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        movm    [d3],(sp)
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        and     0x00000F00,\sr          # isolate IE and IM bits
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        hal_cpu_get_psw d3
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        and     0xfffff0ff,d3
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        or      \sr,d3
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        hal_cpu_set_psw d3
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        movm    (sp),[d3]
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        .endm
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        # Enable further exception processing, and disable
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        # interrupt processing.
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        .macro hal_cpu_except_enable
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        .endm
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        # Return from exception.
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        .macro  hal_cpu_eret pc,sr
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        .endm
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##-----------------------------------------------------------------------------
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# Default interrupt decoding macros.
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#ifndef CYGPKG_HAL_MN10300_INTC_DEFINED
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#ifndef CYGPKG_HAL_MN10300_INTC_INIT_DEFINED
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        # initialize all interrupts to disabled
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        .macro  hal_intc_init
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        .endm
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#endif
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#endif
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#ifndef CYGPKG_HAL_MN10300_INTC_DECODE_DEFINED
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        .macro  hal_intc_decode dreg,areg,dreg1
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        .endm
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#endif
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#------------------------------------------------------------------------------
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# MMU macros.
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#ifndef CYGPKG_HAL_MN10300_MMU_DEFINED
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        .macro  hal_mmu_init
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        .endm
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#endif
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#------------------------------------------------------------------------------
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# MEMC macros.
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#ifndef CYGPKG_HAL_MN10300_MEMC_DEFINED
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        .macro  hal_memc_init
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        .endm
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#endif
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#------------------------------------------------------------------------------
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# Cache macros.
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#ifndef CYGPKG_HAL_MN10300_CACHE_DEFINED
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        .macro  hal_cache_init
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        .endm
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#endif
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#------------------------------------------------------------------------------
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# Diagnostics macros.
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#ifndef CYGPKG_HAL_MN10300_DIAG_DEFINED
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        .macro  hal_diag_init
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        .endm
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        .macro  hal_diag_excpt_start
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        .endm
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        .macro  hal_diag_intr_start
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        .endm
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        .macro  hal_diag_restore
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        .endm
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        .macro  hal_diag_data
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        .endm
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#endif
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#------------------------------------------------------------------------------
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# Timer initialization.
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#ifndef CYGPKG_HAL_MN10300_TIMER_DEFINED
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        .macro  hal_timer_init
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        .endm
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#endif
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#------------------------------------------------------------------------------
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# Monitor initialization.
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#ifndef CYGPKG_HAL_MN10300_MON_DEFINED
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        .macro  hal_mon_init
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        .endm
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#endif
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#------------------------------------------------------------------------------
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#endif // ifndef CYGONCE_HAL_ARCH_INC
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# end of arch.inc

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