URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [mn10300/] [sim/] [v2_0/] [include/] [pkgconf/] [mlt_mn10300_am31_sim_ram.mlt] - Blame information for rev 174

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version 0
region ram 48000000 400000 0 !
section rom_vectors 0 1 0 1 1 1 1 1 48000000 48000000 text text !
section text 0 1 0 1 0 1 0 1 fini fini !
section fini 0 1 0 1 0 1 0 1 rodata rodata !
section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 1 0 1 0 1 0 1 data data !
section data 0 4 0 1 0 1 0 1 bss bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !

Line No.	Rev	Author	Line
1	27	unneback	`version 0`
2			`region ram 48000000 400000 0 !`
3			`section rom_vectors 0 1 0 1 1 1 1 1 48000000 48000000 text text !`
4			`section text 0 1 0 1 0 1 0 1 fini fini !`
5			`section fini 0 1 0 1 0 1 0 1 rodata rodata !`
6			`section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !`
7			`section rodata1 0 1 0 1 0 1 0 1 fixup fixup !`
8			`section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !`
9			`section gcc_except_table 0 1 0 1 0 1 0 1 data data !`
10			`section data 0 4 0 1 0 1 0 1 bss bss !`
11			`section bss 0 4 0 1 0 1 0 1 heap1 heap1 !`
12			`section heap1 0 8 0 0 0 0 0 0 !`

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Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [mn10300/] [sim/] [v2_0/] [include/] [pkgconf/] [mlt_mn10300_am31_sim_ram.mlt] - Blame information for rev 174