OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [mn10300/] [stb/] [v2_0/] [include/] [pkgconf/] [mlt_mn10300_am33_stb_ram.mlt] - Blame information for rev 565

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback 
version 0
2 
region ram 50080000 400000 0 !
3 
section rom_vectors 0 1 0 1 1 1 1 1 50080000 50080000 text text !
4 
section text 0 1 0 1 0 1 0 1 fini fini !
5 
section fini 0 1 0 1 0 1 0 1 rodata rodata !
6 
section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
7 
section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
8 
section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
9 
section gcc_except_table 0 1 0 1 0 1 0 1 data data !
10 
section data 0 4 0 1 0 1 0 1 bss bss !
11 
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
12 
section heap1 0 8 0 0 0 0 0 0 !

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.