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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [mn10300/] [stb/] [v2_0/] [src/] [plf_misc.c] - Blame information for rev 565

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//==========================================================================
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//
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//      plf_misc.c
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//
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//      HAL platform miscellaneous functions
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    nickg
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// Contributors: nickg, jlarmour, dhowells
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// Date:         1999-01-21
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// Purpose:      HAL miscellaneous functions
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// Description:  This file contains miscellaneous functions provided by the
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//               HAL.
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//
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//####DESCRIPTIONEND####
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//
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//========================================================================*/
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#include <pkgconf/hal.h>
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#include <cyg/infra/cyg_type.h>         // Base types
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#include <cyg/infra/cyg_trac.h>         // tracing macros
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#include <cyg/infra/cyg_ass.h>          // assertion macros
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#include <cyg/hal/hal_arch.h>           // architectural definitions
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#include <cyg/hal/hal_intr.h>           // Interrupt handling
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#include <cyg/hal/hal_cache.h>          // Cache handling
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#include <cyg/hal/hal_if.h>
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#include <cyg/hal/hal_misc.h>
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#include <cyg/hal/plf_io.h>
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/*------------------------------------------------------------------------*/
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/* LED support                                                            */
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cyg_uint8 cyg_hal_plf_led_val(CYG_WORD hexdig)
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{
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    static cyg_uint8 map[] = {
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        0x81, // 0
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        0xf3, // 1
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        0x49, // 2
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        0x61, // 3
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        0x33, // 4
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        0x25, // 5
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        0x05, // 6
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        0xf1, // 7
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        0x01, // 8
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        0x21, // 9
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        0x11, // A
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        0x07, // B
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        0x8d, // C
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        0x43, // D
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        0x0d, // E
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        0x1d  // F
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    };
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    return map[(hexdig & 0xF)];
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}
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/*------------------------------------------------------------------------*/
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void hal_platform_init(void)
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{
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    HAL_WRITE_UINT8(HAL_LED_ADDRESS, cyg_hal_plf_led_val(8));
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#if defined(CYG_HAL_STARTUP_ROM)
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    // Note that the hardware seems to come up with the
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    // caches containing random data. Hence they must be
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    // invalidated before being enabled.
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    // However, we only do this if we are in ROM. If we are
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    // in RAM, then we leave the caches in the state chosen
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    // by the ROM monitor. If we enable them when the monitor
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    // is not expecting it, we can end up breaking things if the
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    // monitor is not doing cache flushes.
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    //HAL_ICACHE_INVALIDATE_ALL();    
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    //HAL_ICACHE_ENABLE();
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    //HAL_DCACHE_INVALIDATE_ALL();
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    //HAL_DCACHE_ENABLE();
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#endif
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    // Set up eCos/ROM interfaces
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    hal_if_init();
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#if defined(CYGPKG_KERNEL)                      && \
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    defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT)   && \
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    defined(CYGSEM_HAL_USE_ROM_MONITOR_GDB_stubs)
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    {
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        extern void patch_dbg_syscalls(void * vector);
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        patch_dbg_syscalls( (void *)(&hal_virtual_vector_table[0]) );
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    }
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#endif    
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#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT)
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    {
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        static void hal_ctrlc_isr_init(void);
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        hal_ctrlc_isr_init();
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    }
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#endif    
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}
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/*------------------------------------------------------------------------*/
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/* Control C ISR support                                                  */
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#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) && \
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    !defined(CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT)
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#if CYGHWR_HAL_MN10300_AM33_STB_GDB_PORT == 0
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// We use serial0 on AM33
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#define SERIAL_CR       ((volatile cyg_uint16 *)0xd4002000)
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#define SERIAL_ICR      ((volatile cyg_uint8 *) 0xd4002004)
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#define SERIAL_TXR      ((volatile cyg_uint8 *) 0xd4002008)
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#define SERIAL_RXR      ((volatile cyg_uint8 *) 0xd4002009)
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#define SERIAL_SR       ((volatile cyg_uint16 *)0xd400200c)
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// Timer 1 provided baud rate divisor
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#define TIMER_MD       ((volatile cyg_uint8 *)0xd4003000)
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#define TIMER_BR       ((volatile cyg_uint8 *)0xd4003010)
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#define TIMER_CR       ((volatile cyg_uint8 *)0xd4003020)
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#define SIO_LSTAT_TRDY  0x20
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#define SIO_LSTAT_RRDY  0x10
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#else
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#error Unsupported GDB port
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#endif
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struct Hal_SavedRegisters *hal_saved_interrupt_state;
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static void hal_ctrlc_isr_init(void)
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{
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//    cyg_uint16 cr;
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//    HAL_READ_UINT16( SERIAL_CR, cr );
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//    cr |= LCR_RXE;
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//    HAL_WRITE_UINT16( SERIAL_CR, cr );
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    HAL_INTERRUPT_SET_LEVEL( CYGHWR_HAL_GDB_PORT_VECTOR, 4 );
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    HAL_INTERRUPT_UNMASK( CYGHWR_HAL_GDB_PORT_VECTOR );
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}
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cyg_uint32 hal_ctrlc_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
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{
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    char c;
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    cyg_uint16 sr;
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    HAL_INTERRUPT_ACKNOWLEDGE( CYGHWR_HAL_GDB_PORT_VECTOR );
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    HAL_READ_UINT16( SERIAL_SR, sr );
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    if( sr & SIO_LSTAT_RRDY )
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    {
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        HAL_READ_UINT8( SERIAL_RXR, c);
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        if( cyg_hal_is_break( &c , 1 ) )
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            cyg_hal_user_break( (CYG_ADDRWORD *)hal_saved_interrupt_state );
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    }
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    return 1;
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}
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#endif
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/*------------------------------------------------------------------------*/
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/* End of plf_misc.c                                                      */

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