OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [mn10300/] [stb/] [v2_0/] [src/] [plf_stub.c] - Blame information for rev 174

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
//=============================================================================
2
//
3
//      plf_stub.c
4
//
5
//      Platform specific code for GDB stub support.
6
//
7
//=============================================================================
8
//####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under
14
// the terms of the GNU General Public License as published by the Free
15
// Software Foundation; either version 2 or (at your option) any later version.
16
//
17
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
20
// for more details.
21
//
22
// You should have received a copy of the GNU General Public License along
23
// with eCos; if not, write to the Free Software Foundation, Inc.,
24
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25
//
26
// As a special exception, if other files instantiate templates or use macros
27
// or inline functions from this file, or you compile this file and link it
28
// with other works to produce a work based on this file, this file does not
29
// by itself cause the resulting work to be covered by the GNU General Public
30
// License. However the source code for this file must still be made available
31
// in accordance with section (3) of the GNU General Public License.
32
//
33
// This exception does not invalidate any other reasons why a work based on
34
// this file might be covered by the GNU General Public License.
35
//
36
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37
// at http://sources.redhat.com/ecos/ecos-license/
38
// -------------------------------------------
39
//####ECOSGPLCOPYRIGHTEND####
40
//=============================================================================
41
//#####DESCRIPTIONBEGIN####
42
//
43
// Author(s):   nickg, jskov (based on the old mn10300 hal_stub.c)
44
// Contributors:nickg, jskov, dhowells
45
// Date:        1999-02-12
46
// Purpose:     Platform specific code for GDB stub support.
47
//              
48
//####DESCRIPTIONEND####
49
//
50
//=============================================================================
51
 
52
#include <pkgconf/hal.h>
53
 
54
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
55
 
56
#include <cyg/hal/hal_stub.h>
57
 
58
#include <cyg/hal/hal_io.h>             // HAL IO macros
59
#include <cyg/hal/hal_intr.h>           // HAL interrupt macros
60
 
61
//---------------------------------------------------------------------------
62
// MN10300 Serial line
63
 
64
// We use serial0 on AM33
65
#define SERIAL0_CR       ((volatile cyg_uint16 *)0xd4002000)
66
#define SERIAL0_ICR      ((volatile cyg_uint8 *) 0xd4002004)
67
#define SERIAL0_TXR      ((volatile cyg_uint8 *) 0xd4002008)
68
#define SERIAL0_RXR      ((volatile cyg_uint8 *) 0xd4002009)
69
#define SERIAL0_SR       ((volatile cyg_uint16 *)0xd400200c)
70
 
71
// Timer 2 provides baud rate divisor
72
#define TIMER0_MD       ((volatile cyg_uint8 *)0xd4003002)
73
#define TIMER0_BR       ((volatile cyg_uint8 *)0xd4003012)
74
#define TIMER0_CR       ((volatile cyg_uint8 *)0xd4003022)
75
 
76
#define SIO1_LSTAT_TRDY  0x20
77
#define SIO1_LSTAT_RRDY  0x10
78
 
79
 
80
//---------------------------------------------------------------------------
81
 
82
#ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
83
// This ISR is called from the interrupt handler. This should only
84
// happen when there is no serial driver, so the code shouldn't mess
85
// anything up.
86
int cyg_hal_gdb_isr(cyg_uint32 vector, target_register_t pc)
87
{
88
    if ( CYGNUM_HAL_INTERRUPT_SERIAL_0_RX == vector ) {
89
        cyg_uint8 c;
90
 
91
        HAL_READ_UINT8 (SERIAL0_RXR, c);
92
        HAL_INTERRUPT_ACKNOWLEDGE (CYGNUM_HAL_INTERRUPT_SERIAL_0_RX);
93
 
94
        if( 3 == c )
95
        {
96
            // Ctrl-C: set a breakpoint at PC so GDB will display the
97
            // correct program context when stopping rather than the
98
            // interrupt handler.
99
            cyg_hal_gdb_interrupt (pc);
100
 
101
            // Interrupt handled. Don't call ISR proper. At return
102
            // from the VSR, execution will stop at the breakpoint
103
            // just set.
104
            return 0;
105
        }
106
    }
107
 
108
    // Not caused by GDB. Call ISR proper.
109
    return 1;
110
}
111
 
112
int hal_stb_interruptible(int state)
113
{
114
    if (state) {
115
        HAL_WRITE_UINT8 (SERIAL0_ICR, 0);
116
        HAL_INTERRUPT_ACKNOWLEDGE (CYGNUM_HAL_INTERRUPT_SERIAL_0_RX)
117
        HAL_INTERRUPT_UNMASK (CYGNUM_HAL_INTERRUPT_SERIAL_0_RX)
118
    } else {
119
        HAL_INTERRUPT_MASK (CYGNUM_HAL_INTERRUPT_SERIAL_0_RX)
120
    }
121
    return 0;
122
}
123
 
124
void hal_stb_init_break_irq( void )
125
{
126
    // Enable serial receive interrupts.
127
    HAL_WRITE_UINT8 (SERIAL0_ICR, 0);
128
    HAL_INTERRUPT_ACKNOWLEDGE (CYGNUM_HAL_INTERRUPT_SERIAL_0_RX)
129
    HAL_INTERRUPT_UNMASK (CYGNUM_HAL_INTERRUPT_SERIAL_0_RX)
130
    HAL_ENABLE_INTERRUPTS();
131
}
132
#endif
133
 
134
//-----------------------------------------------------------------------------
135
 
136
void hal_stb_platform_init(void)
137
{
138
    extern CYG_ADDRESS hal_virtual_vector_table[64];
139
    extern void init_thread_syscall( void *);
140
    extern void install_async_breakpoint(void *epc);
141
//    void (*oldvsr)(void);
142
    extern void __default_exception_vsr(void);
143
 
144
    // Ensure that the breakpoint VSR points to the default VSR. This will pass
145
    // it on to the stubs.
146
//    HAL_VSR_SET( CYGNUM_HAL_VECTOR_BREAKPOINT, __default_exception_vsr, &oldvsr );
147
 
148
    // Install async breakpoint handler into vector table.
149
    hal_virtual_vector_table[35] = (CYG_ADDRESS)install_async_breakpoint;
150
 
151
#if !defined(CYGPKG_KERNEL) && defined(CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT)
152
    // Only include this code if we do not have a kernel. Otherwise
153
    // the kernel supplies the functionality for the app we are linked
154
    // with.
155
 
156
    // Prepare for application installation of thread info function in
157
    // vector table.
158
    hal_virtual_vector_table[15] = 0;
159
    init_thread_syscall( (void *)&hal_virtual_vector_table[15] );
160
 
161
#endif
162
}
163
 
164
 
165
#endif // ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
166
//-----------------------------------------------------------------------------
167
// End of plf_stub.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.