Subversion Repositories openrisc

# ====================================================================

#

#      hal_openrisc_orp.cdl

#

#      OpenRISC Reference Platform (ORP) HAL package configuration data

#

# ====================================================================

#####ECOSGPLCOPYRIGHTBEGIN####

## -------------------------------------------

## This file is part of eCos, the Embedded Configurable Operating System.

## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.

##

## eCos is free software; you can redistribute it and/or modify it under

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##

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## or inline functions from this file, or you compile this file and link it

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#####ECOSGPLCOPYRIGHTEND####

# ====================================================================

######DESCRIPTIONBEGIN####

#

# Author(s):      sfurman

# Contributors:

# Date:           2003-01-20

#

#####DESCRIPTIONEND####

#

# ====================================================================

cdl_package CYGPKG_HAL_OPENRISC_ORP {

    display  "OpenRISC Reference Platform"

    parent        CYGPKG_HAL_OPENRISC

    include_dir   cyg/hal

    hardware

    description   "

           The ORP HAL package should be used when targetting the

           OpenRISC Reference Platform."

    compile       hal_diag.c hal_aux.c

    implements    CYGINT_HAL_DEBUG_GDB_STUBS

    implements    CYGINT_HAL_DEBUG_GDB_STUBS_BREAK

    implements    CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT

    implements    CYGINT_HAL_VIRTUAL_VECTOR_COMM_BAUD_SUPPORT

    define_proc {

        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   "

        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H "

    }

    cdl_component CYG_HAL_STARTUP {

        display       "Startup type"

        flavor        data

        legal_values  {"RAM" "ROM"}

        default_value {"ROM"}

        no_define

        define -file system.h CYG_HAL_STARTUP

        description   "

            Selects whether code initially runs from ROM or RAM.  In the case of ROM startup,

            it's possible for the code to be copied into RAM and executed there."

    }

    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD {

        display       "Diagnostic serial port baud rate"

        flavor        data

        legal_values  9600 19200 38400 57600 115200 230400 460800 921600

        default_value 115200

        description   "

            This option selects the baud rate used for the diagnostic console.

            Note: this should match the value chosen for the GDB port if the

            diagnostic and GDB port are the same.

            Note: very high baud rates are useful during simulation."

    }

    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD {

        display       "GDB serial port baud rate"

        flavor        data

        legal_values  9600 19200 38400 57600 115200 230400 460800 921600

        default_value 115200

        description   "

            This option controls the baud rate used for the GDB connection.

            Note: very high baud rates are useful during simulation."

    }

    # Real-time clock/counter specifics

    cdl_component CYGNUM_HAL_RTC_CONSTANTS {

        display       "Real-time clock constants."

        flavor        none

        cdl_option CYGNUM_HAL_RTC_NUMERATOR {

            display       "Real-time clock numerator"

            flavor        data

            calculated    1000000000

        }

        cdl_option CYGNUM_HAL_RTC_DENOMINATOR {

            display       "Real-time clock denominator"

            flavor        data

            calculated    100

        }

        cdl_option CYGNUM_HAL_RTC_PERIOD {

            display       "Real-time clock period"

            flavor        data

# sfurman: Probably ought be "calculated" - not "default_value"

# However, it is handy to override this value during simulator-based testing

            default_value {CYGHWR_HAL_OPENRISC_CPU_FREQ * 1000000 / CYGNUM_HAL_RTC_DENOMINATOR}

            description   "

                The tick timer facility is used

                to drive the eCos kernel RTC. The count register

                increments at the CPU clock speed.  By default, 100 Hz"

        }

    }

    cdl_option CYGBLD_BUILD_GDB_STUBS {

        display "Build GDB stub ROM image"

        default_value 0

        parent CYGBLD_GLOBAL_OPTIONS

        requires { CYG_HAL_STARTUP == "ROM" }

        requires CYGSEM_HAL_ROM_MONITOR

        requires CYGBLD_BUILD_COMMON_GDB_STUBS

        requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS

        requires ! CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT

        requires ! CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT

        requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT

        requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM

        no_define

        description "

                This option enables the building of the GDB stubs for the

                board. The common HAL controls takes care of most of the

                build process, but the final conversion from ELF image to

                binary data is handled by the platform CDL, allowing

                relocation of the data if necessary."

        make -priority 320 {

            /bin/gdb_module.bin : /bin/gdb_module.img

            $(OBJCOPY) -O binary $< $@

        }

    }

    cdl_option CYGNUM_HAL_BREAKPOINT_LIST_SIZE {

        display       "Number of breakpoints supported by the HAL."

        flavor        data

        default_value 25

        description   "

            This option determines the number of breakpoints supported by the HAL."

    }

    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {

        display      "Number of communication channels on the board"

        flavor       data

        default_value  1

    }

    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {

        display          "Debug serial port"

        active_if        CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE

        flavor data

        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1

        default_value    0

        description      "

           The ORP platform has at least one serial port, but it can potentially have several.

           This option chooses which port will be used to connect to a host

           running GDB."

    }

     cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {

        display          "Diagnostic serial port"

        active_if        CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE

        flavor data

        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1

        default_value    0

        description      "

           The ORP platform has at least one serial port, but it can potentially have several.

           This option chooses which port will be used for diagnostic output."

     }

    cdl_component CYGBLD_GLOBAL_OPTIONS {

        display "Global build options"

        flavor  none

        description   "

            Global build options including control over

            compiler flags, linker flags and choice of toolchain."

        parent  CYGPKG_NONE

        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {

            display "Global command prefix"

            flavor  data

            no_define

            default_value { "or32-elf" }

            description "

                This option specifies the command prefix used when

                invoking the build tools."

        }

        cdl_option CYGBLD_GLOBAL_CFLAGS {

            display "Global compiler flags"

            flavor  data

            no_define

            default_value { "-msoft-float -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -fno-omit-frame-pointer -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }

            description   "

                This option controls the global compiler flags which

                are used to compile all packages by

                default. Individual packages may define

                options which override these global flags."

        }

        cdl_option CYGBLD_GLOBAL_LDFLAGS {

            display "Global linker flags"

            flavor  data

            no_define

            default_value { "-msoft-float -g -nostdlib -Wl,--gc-sections -Wl,-static" }

            description   "

                This option controls the global linker flags. Individual

                packages may define options which override these global flags."

        }

    }

    cdl_component CYGHWR_MEMORY_LAYOUT {

        display "Memory layout"

        flavor data

        no_define

        calculated { CYG_HAL_STARTUP == "RAM" ? "openrisc_orp_ram" : \

                                                "openrisc_orp_rom" }

        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {

            display "Memory layout linker script fragment"

            flavor data

            no_define

            define -file system.h CYGHWR_MEMORY_LAYOUT_LDI

            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \

                                                    "" }

        }

        cdl_option CYGHWR_MEMORY_LAYOUT_H {

            display "Memory layout header file"

            flavor data

            no_define

            define -file system.h CYGHWR_MEMORY_LAYOUT_H

            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \

                                                    "" }

        }

    }

    cdl_option CYGSEM_HAL_USE_ROM_MONITOR {

        display       "Work with a ROM monitor"

        flavor        booldata

        legal_values  { "Generic" "CygMon" "GDB_stubs" }

        default_value { CYG_HAL_STARTUP == "RAM" ? "CygMon" : 0 }

        parent        CYGPKG_HAL_ROM_MONITOR

        requires      { CYG_HAL_STARTUP == "RAM" }

        description   "

            Support can be enabled for three different varieties of ROM monitor.

            This support changes various eCos semantics such as the encoding

            of diagnostic output, or the overriding of hardware interrupt

            vectors.

            Firstly there is \"Generic\" support which prevents the HAL

            from overriding the hardware vectors that it does not use, to

            instead allow an installed ROM monitor to handle them. This is

            the most basic support which is likely to be common to most

            implementations of ROM monitor.

            \"CygMon\" provides support for the Cygnus ROM Monitor.

            And finally, \"GDB_stubs\" provides support when GDB stubs are

            included in the ROM monitor or boot ROM."

    }

    cdl_option CYGSEM_HAL_ROM_MONITOR {

        display       "Behave as a ROM monitor"

        flavor        bool

        default_value 1

        parent        CYGPKG_HAL_ROM_MONITOR

        requires      { CYG_HAL_STARTUP == "ROM" }

        description   "

            Enable this option if this program is to be used as a ROM monitor,

            i.e. applications will be loaded into RAM on the board, and this

            ROM monitor may process exceptions or interrupts generated from the

            application. This enables features such as utilizing a separate

            interrupt stack when exceptions are generated."

    }

    cdl_component CYGPKG_REDBOOT_HAL_OPTIONS {

        display       "Redboot HAL options"

        flavor        none

        no_define

        parent        CYGPKG_REDBOOT

        active_if     CYGPKG_REDBOOT

        description   "

            This option lists the target's requirements for a valid Redboot

            configuration."

        cdl_option CYGBLD_BUILD_REDBOOT_BIN {

            display       "Build Redboot ROM binary image"

            active_if     CYGBLD_BUILD_REDBOOT

            default_value 1

            no_define

            description "This option enables the conversion of the Redboot ELF

                         image to a binary image suitable for ROM programming."

            compile -library=libextras.a

            make -priority 325 {

                /bin/redboot.srec : /bin/redboot.elf

                $(OBJCOPY) --strip-all $< $(@:.srec=.img)

                $(OBJCOPY) -O srec $< $@

            }

        }

    }

    define_proc {

        puts $cdl_header "#define CYGHWR_HAL_VSR_TABLE    0"

        puts $cdl_header "#define CYGHWR_HAL_VIRTUAL_VECTOR_TABLE 0xF00"

    }

}