OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [powerpc/] [adder/] [v2_0/] [src/] [hal_aux.c] - Blame information for rev 541

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
//=============================================================================
2
//
3
//      hal_aux.c
4
//
5
//      HAL auxiliary objects and code; per platform
6
//
7
//=============================================================================
8
//####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12
// Copyright (C) 2002 Gary Thomas
13
//
14
// eCos is free software; you can redistribute it and/or modify it under
15
// the terms of the GNU General Public License as published by the Free
16
// Software Foundation; either version 2 or (at your option) any later version.
17
//
18
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
19
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
20
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
21
// for more details.
22
//
23
// You should have received a copy of the GNU General Public License along
24
// with eCos; if not, write to the Free Software Foundation, Inc.,
25
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
26
//
27
// As a special exception, if other files instantiate templates or use macros
28
// or inline functions from this file, or you compile this file and link it
29
// with other works to produce a work based on this file, this file does not
30
// by itself cause the resulting work to be covered by the GNU General Public
31
// License. However the source code for this file must still be made available
32
// in accordance with section (3) of the GNU General Public License.
33
//
34
// This exception does not invalidate any other reasons why a work based on
35
// this file might be covered by the GNU General Public License.
36
//
37
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
38
// at http://sources.redhat.com/ecos/ecos-license/
39
// -------------------------------------------
40
//####ECOSGPLCOPYRIGHTEND####
41
//=============================================================================
42
//#####DESCRIPTIONBEGIN####
43
//
44
// Author(s):   hmt
45
// Contributors:hmt
46
// Date:        1999-06-08
47
// Purpose:     HAL aux objects: startup tables.
48
// Description: Tables for per-platform initialization
49
//
50
//####DESCRIPTIONEND####
51
//
52
//=============================================================================
53
 
54
#include <pkgconf/hal.h>
55
#include <pkgconf/hal_powerpc_quicc.h>
56
 
57
#include <cyg/infra/cyg_type.h>
58
#include <cyg/hal/hal_mem.h>            // HAL memory definitions
59
#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
60
#include <cyg/hal/ppc_regs.h>
61
#include <cyg/hal/quicc/ppc8xx.h>
62
#include <cyg/hal/hal_if.h>             // hal_if_init
63
#include <cyg/hal/hal_io.h>
64
#include CYGHWR_MEMORY_LAYOUT_H
65
 
66
// The memory map is weakly defined, allowing the application to redefine
67
// it if necessary. The regions defined below are the minimum requirements.
68
CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = {
69
    // Mapping for the Adder 85x development boards
70
    CYGARC_MEMDESC_CACHE(   0xfe000000, 0x00800000 ), // ROM region
71
    CYGARC_MEMDESC_NOCACHE( 0xff000000, 0x00100000 ), // MCP registers
72
    CYGARC_MEMDESC_NOCACHE( 0xfa000000, 0x00400000 ), // Control/Status+LEDs
73
    CYGARC_MEMDESC_CACHE(   CYGMEM_REGION_ram, CYGMEM_REGION_ram_SIZE ), // Main memory
74
 
75
    CYGARC_MEMDESC_TABLE_END
76
};
77
 
78
//--------------------------------------------------------------------------
79
// Platform init code.
80
void
81
hal_platform_init(void)
82
{
83
    volatile EPPC *eppc = (volatile EPPC *)eppc_base();
84
 
85
    // Special routing information for CICR
86
    eppc->cpmi_cicr &= 0xFF0000;  // Routing bits
87
    eppc->cpmi_cicr |= 0x240000;  // SCC2, SCC3 on "normal" bit positions
88
 
89
    eppc->pip_pbpar &= ~0x0000400E;   // PB29..30 AS GPIO
90
    eppc->pip_pbdir |=  0x0000400E;
91
    eppc->pip_pbdat  =  0x00004000;
92
 
93
    hal_if_init();
94
 
95
    _adder_set_leds(0x1);
96
}
97
 
98
void
99
_adder_set_leds(int pat)
100
{
101
    volatile EPPC *eppc = (volatile EPPC *)eppc_base();
102
 
103
    eppc->pip_pbdat = (eppc->pip_pbdat & ~0x0000000E) | (pat << 1);
104
}
105
 
106
int
107
_adder_get_leds(void)
108
{
109
    volatile EPPC *eppc = (volatile EPPC *)eppc_base();
110
 
111
    return ((eppc->pip_pbdat & 0x0000000E) >> 1);
112
}
113
 
114
// EOF hal_aux.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.