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#ifndef CYGONCE_HAL_INTR_H
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#define CYGONCE_HAL_INTR_H
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//==========================================================================
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//
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// hal_intr.h
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//
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// HAL Interrupt and clock support
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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// Copyright (C) 2002 Gary Thomas
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): nickg
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// Contributors: nickg, jskov,
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// jlarmour
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// Date: 1999-02-19
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// Purpose: Define Interrupt support
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// Description: The macros defined here provide the HAL APIs for handling
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// interrupts and the clock.
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//
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// Usage:
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// #include <cyg/hal/hal_intr.h>
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// ...
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//
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <pkgconf/hal.h>
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#include <cyg/infra/cyg_type.h> // types
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#include <cyg/hal/ppc_regs.h> // register definitions
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#include <cyg/hal/var_intr.h> // variant extensions
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//--------------------------------------------------------------------------
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// PowerPC exception vectors. These correspond to VSRs and are the values
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// to use for HAL_VSR_GET/SET
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#define CYGNUM_HAL_VECTOR_RESERVED_0 0
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#define CYGNUM_HAL_VECTOR_RESET 1
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#define CYGNUM_HAL_VECTOR_MACHINE_CHECK 2
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#define CYGNUM_HAL_VECTOR_DSI 3
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#define CYGNUM_HAL_VECTOR_ISI 4
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#define CYGNUM_HAL_VECTOR_INTERRUPT 5
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#define CYGNUM_HAL_VECTOR_ALIGNMENT 6
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#define CYGNUM_HAL_VECTOR_PROGRAM 7
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#define CYGNUM_HAL_VECTOR_FP_UNAVAILABLE 8
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#define CYGNUM_HAL_VECTOR_DECREMENTER 9
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#define CYGNUM_HAL_VECTOR_RESERVED_A 10
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#define CYGNUM_HAL_VECTOR_RESERVED_B 11
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#define CYGNUM_HAL_VECTOR_SYSTEM_CALL 12
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#define CYGNUM_HAL_VECTOR_TRACE 13
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#define CYGNUM_HAL_VECTOR_FP_ASSIST 14
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#define CYGNUM_HAL_VSR_MIN CYGNUM_HAL_VECTOR_RESERVED_0
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#ifndef CYGNUM_HAL_VSR_MAX
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# define CYGNUM_HAL_VSR_MAX CYGNUM_HAL_VECTOR_FP_ASSIST
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#endif
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#define CYGNUM_HAL_VSR_COUNT ( CYGNUM_HAL_VSR_MAX + 1 )
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#ifndef CYG_VECTOR_IS_INTERRUPT
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# define CYG_VECTOR_IS_INTERRUPT(v) \
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(CYGNUM_HAL_VECTOR_INTERRUPT == (v) \
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|| CYGNUM_HAL_VECTOR_DECREMENTER == (v))
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#endif
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// The decoded interrupts.
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// Define decrementer as the first interrupt since it is guaranteed to
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// be defined on all PowerPCs. External may expand into several interrupts
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// depending on interrupt controller capabilities.
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#define CYGNUM_HAL_INTERRUPT_DECREMENTER 0
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#define CYGNUM_HAL_INTERRUPT_EXTERNAL 1
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#define CYGNUM_HAL_ISR_MIN CYGNUM_HAL_INTERRUPT_DECREMENTER
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#ifndef CYGNUM_HAL_ISR_MAX
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# define CYGNUM_HAL_ISR_MAX CYGNUM_HAL_INTERRUPT_EXTERNAL
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#endif
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#define CYGNUM_HAL_ISR_COUNT ( CYGNUM_HAL_ISR_MAX + 1 )
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#ifndef CYGHWR_HAL_EXCEPTION_VECTORS_DEFINED
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// Exception vectors. These are the values used when passed out to an
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// external exception handler using cyg_hal_deliver_exception()
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#define CYGNUM_HAL_EXCEPTION_RESERVED_0 CYGNUM_HAL_VECTOR_RESERVED_0
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#define CYGNUM_HAL_EXCEPTION_MACHINE_CHECK CYGNUM_HAL_VECTOR_MACHINE_CHECK
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#define CYGNUM_HAL_EXCEPTION_DATA_ACCESS CYGNUM_HAL_VECTOR_DSI
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#define CYGNUM_HAL_EXCEPTION_CODE_ACCESS CYGNUM_HAL_VECTOR_ISI
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#define CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS \
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CYGNUM_HAL_VECTOR_ALIGNMENT
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#define CYGNUM_HAL_EXCEPTION_FPU_NOT_AVAIL CYGNUM_HAL_VECTOR_FP_UNAVAILABLE
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#define CYGNUM_HAL_EXCEPTION_RESERVED_A CYGNUM_HAL_VECTOR_RESERVED_A
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#define CYGNUM_HAL_EXCEPTION_RESERVED_B CYGNUM_HAL_VECTOR_RESERVED_B
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#define CYGNUM_HAL_EXCEPTION_SYSTEM_CALL CYGNUM_HAL_VECTOR_SYSTEM_CALL
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#define CYGNUM_HAL_EXCEPTION_TRACE CYGNUM_HAL_VECTOR_TRACE
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#define CYGNUM_HAL_EXCEPTION_FP_ASSIST CYGNUM_HAL_VECTOR_FP_ASSIST
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#define CYGNUM_HAL_EXCEPTION_MIN CYGNUM_HAL_EXCEPTION_RESERVED_0
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#ifndef CYGNUM_HAL_EXCEPTION_MAX
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#define CYGNUM_HAL_EXCEPTION_MAX CYGNUM_HAL_VSR_MAX
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#endif
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#define CYGHWR_HAL_EXCEPTION_VECTORS_DEFINED
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#endif // CYGHWR_HAL_EXCEPTION_VECTORS_DEFINED
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// FIXME: This is still rather ugly. Should probably be made variant
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// specific using a decode_hal_exception macro or somesuch.
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// decoded exception vectors
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#define CYGNUM_HAL_EXCEPTION_TRAP (-1)
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#define CYGNUM_HAL_EXCEPTION_PRIVILEGED_INSTRUCTION (-2)
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#define CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION (-3)
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#define CYGNUM_HAL_EXCEPTION_FPU (-4)
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#undef CYGNUM_HAL_EXCEPTION_MIN
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#define CYGNUM_HAL_EXCEPTION_MIN CYGNUM_HAL_EXCEPTION_FPU
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#define CYGNUM_HAL_EXCEPTION_COUNT \
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( CYGNUM_HAL_EXCEPTION_MAX - CYGNUM_HAL_EXCEPTION_MIN + 1 )
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//--------------------------------------------------------------------------
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// Static data used by HAL
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// ISR tables
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externC volatile CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];
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externC volatile CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];
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externC volatile CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];
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// VSR table
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externC volatile CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_COUNT];
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//--------------------------------------------------------------------------
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// Default ISRs
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// The #define is used to test whether this routine exists, and to allow
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// us to call it.
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externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data);
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externC cyg_uint32 hal_default_decrementer_isr(CYG_ADDRWORD vector,
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CYG_ADDRWORD data);
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#define HAL_DEFAULT_ISR hal_default_isr
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//--------------------------------------------------------------------------
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// Interrupt state storage
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typedef cyg_uint32 CYG_INTERRUPT_STATE;
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//--------------------------------------------------------------------------
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// Interrupt control macros
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#define HAL_DISABLE_INTERRUPTS(_old_) \
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CYG_MACRO_START \
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cyg_uint32 tmp1, tmp2; \
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asm volatile ( \
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"mfmsr %0;" \
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"mr %2,%0;" \
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"li %1,0;" \
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"rlwimi %2,%1,0,16,16;" \
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"mtmsr %2;" \
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: "=r"(_old_), "=r" (tmp1), "=r" (tmp2)); \
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CYG_MACRO_END
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#define HAL_ENABLE_INTERRUPTS() \
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CYG_MACRO_START \
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cyg_uint32 tmp1, tmp2; \
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asm volatile ( \
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"mfmsr %0;" \
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"ori %1,%1,0x8000;" \
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"rlwimi %0,%1,0,16,16;" \
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"mtmsr %0;" \
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: "=r" (tmp1), "=r" (tmp2)); \
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CYG_MACRO_END
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#define HAL_RESTORE_INTERRUPTS(_old_) \
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CYG_MACRO_START \
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cyg_uint32 tmp; \
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asm volatile ( \
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"mfmsr %0;" \
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"rlwimi %0,%1,0,16,16;" \
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"mtmsr %0;" \
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: "=&r" (tmp) \
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: "r" (_old_)); \
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CYG_MACRO_END
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#define HAL_QUERY_INTERRUPTS(_old_) \
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CYG_MACRO_START \
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cyg_uint32 tmp; \
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asm volatile ( \
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"mfmsr %0;" \
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"lis %1,0;" \
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"ori %1,%1,0x8000;" \
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"and %0,%0,%1;" \
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: "=&r"(_old_), "=r" (tmp)); \
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CYG_MACRO_END
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//--------------------------------------------------------------------------
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// Vector translation.
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#ifndef HAL_TRANSLATE_VECTOR
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// Basic PowerPC configuration only has two vectors; decrementer and
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// external. Isr tables/chaining use same vector decoder.
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#define HAL_TRANSLATE_VECTOR(_vector_,_index_) \
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(_index_) = (_vector_)
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#endif
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//--------------------------------------------------------------------------
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#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
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externC void hal_interrupt_stack_call_pending_DSRs(void);
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#define HAL_INTERRUPT_STACK_CALL_PENDING_DSRS() \
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hal_interrupt_stack_call_pending_DSRs()
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// these are offered solely for stack usage testing
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// if they are not defined, then there is no interrupt stack.
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#define HAL_INTERRUPT_STACK_BASE cyg_interrupt_stack_base
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#define HAL_INTERRUPT_STACK_TOP cyg_interrupt_stack
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// use them to declare these extern however you want:
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// extern char HAL_INTERRUPT_STACK_BASE[];
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// extern char HAL_INTERRUPT_STACK_TOP[];
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// is recommended
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#endif
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//--------------------------------------------------------------------------
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// Interrupt and VSR attachment macros
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#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \
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CYG_MACRO_START \
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cyg_uint32 _index_; \
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HAL_TRANSLATE_VECTOR ((_vector_), _index_); \
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\
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| 267 |
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if((hal_interrupt_handlers[_index_] \
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== (CYG_ADDRESS)hal_default_decrementer_isr) \
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|| (hal_interrupt_handlers[_index_] == (CYG_ADDRESS)hal_default_isr)) \
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(_state_) = 0; \
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else \
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(_state_) = 1; \
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CYG_MACRO_END
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#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \
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CYG_MACRO_START \
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cyg_uint32 _index_; \
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| 278 |
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HAL_TRANSLATE_VECTOR ((_vector_), _index_); \
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\
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if((hal_interrupt_handlers[_index_] \
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== (CYG_ADDRESS)hal_default_decrementer_isr) \
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|| (hal_interrupt_handlers[_index_] == (CYG_ADDRESS)hal_default_isr)) \
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{ \
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| 284 |
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hal_interrupt_handlers[_index_] = (CYG_ADDRESS)_isr_; \
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hal_interrupt_data[_index_] = (CYG_ADDRWORD) _data_; \
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hal_interrupt_objects[_index_] = (CYG_ADDRESS)_object_; \
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} \
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CYG_MACRO_END
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#define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \
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CYG_MACRO_START \
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cyg_uint32 _index_; \
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HAL_TRANSLATE_VECTOR ((_vector_), _index_); \
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\
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| 295 |
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if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)_isr_ ) \
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{ \
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| 297 |
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if (CYGNUM_HAL_INTERRUPT_DECREMENTER == (_vector_)) \
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hal_interrupt_handlers[_index_] = \
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(CYG_ADDRESS)hal_default_decrementer_isr; \
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else \
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| 301 |
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hal_interrupt_handlers[_index_] = (CYG_ADDRESS)hal_default_isr; \
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| 302 |
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hal_interrupt_data[_index_] = 0; \
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hal_interrupt_objects[_index_] = 0; \
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} \
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| 305 |
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CYG_MACRO_END
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| 306 |
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| 307 |
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#define HAL_VSR_GET( _vector_, _pvsr_ ) \
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*(CYG_ADDRESS *)(_pvsr_) = hal_vsr_table[_vector_];
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| 311 |
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#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) \
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| 312 |
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CYG_MACRO_START \
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| 313 |
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if( _poldvsr_ != NULL ) \
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| 314 |
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*(CYG_ADDRESS *)_poldvsr_ = hal_vsr_table[_vector_]; \
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| 315 |
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hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_; \
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| 316 |
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CYG_MACRO_END
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| 317 |
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|
| 318 |
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// This is an ugly name, but what it means is: grab the VSR back to eCos
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| 319 |
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// internal handling, or if you like, the default handler. But if
|
| 320 |
|
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// cooperating with GDB and CygMon, the default behaviour is to pass most
|
| 321 |
|
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// exceptions to CygMon. This macro undoes that so that eCos handles the
|
| 322 |
|
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// exception. So use it with care.
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| 323 |
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externC void cyg_hal_default_interrupt_vsr( void );
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| 324 |
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externC void cyg_hal_default_exception_vsr( void );
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| 325 |
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#define HAL_VSR_SET_TO_ECOS_HANDLER( _vector_, _poldvsr_ ) \
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| 326 |
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CYG_MACRO_START \
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| 327 |
|
|
if( (void*)_poldvsr_ != (void*)NULL ) \
|
| 328 |
|
|
*(CYG_ADDRESS *)_poldvsr_ = hal_vsr_table[_vector_]; \
|
| 329 |
|
|
hal_vsr_table[_vector_] = ( CYG_VECTOR_IS_INTERRUPT( _vector_ ) \
|
| 330 |
|
|
? (CYG_ADDRESS)cyg_hal_default_interrupt_vsr \
|
| 331 |
|
|
: (CYG_ADDRESS)cyg_hal_default_exception_vsr ); \
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| 332 |
|
|
CYG_MACRO_END
|
| 333 |
|
|
|
| 334 |
|
|
|
| 335 |
|
|
#ifndef CYGHWR_HAL_INTERRUPT_CONTROLLER_ACCESS_DEFINED
|
| 336 |
|
|
|
| 337 |
|
|
#define HAL_INTERRUPT_MASK( _vector_ )
|
| 338 |
|
|
|
| 339 |
|
|
#define HAL_INTERRUPT_UNMASK( _vector_ )
|
| 340 |
|
|
|
| 341 |
|
|
#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ )
|
| 342 |
|
|
|
| 343 |
|
|
#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ )
|
| 344 |
|
|
|
| 345 |
|
|
#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ )
|
| 346 |
|
|
|
| 347 |
|
|
#endif
|
| 348 |
|
|
|
| 349 |
|
|
//--------------------------------------------------------------------------
|
| 350 |
|
|
// Clock control
|
| 351 |
|
|
|
| 352 |
|
|
#ifndef CYGHWR_HAL_CLOCK_DEFINED
|
| 353 |
|
|
// Note: variant or platform allowed to override these definitions
|
| 354 |
|
|
|
| 355 |
|
|
#define HAL_CLOCK_INITIALIZE( _period_ ) \
|
| 356 |
|
|
CYG_MACRO_START \
|
| 357 |
|
|
asm volatile ( \
|
| 358 |
|
|
"mtdec %0;" \
|
| 359 |
|
|
: \
|
| 360 |
|
|
: "r"(_period_) \
|
| 361 |
|
|
); \
|
| 362 |
|
|
CYG_MACRO_END
|
| 363 |
|
|
|
| 364 |
|
|
#define HAL_CLOCK_RESET( _vector_, _period_ ) \
|
| 365 |
|
|
CYG_MACRO_START \
|
| 366 |
|
|
cyg_uint32 tmp; \
|
| 367 |
|
|
asm volatile ( \
|
| 368 |
|
|
"mfdec %0;" \
|
| 369 |
|
|
"add. %0,%0,%1;" \
|
| 370 |
|
|
"bgt 1f;" \
|
| 371 |
|
|
"mr %0,%1;" \
|
| 372 |
|
|
"1: mtdec %0;" \
|
| 373 |
|
|
: "=&r" (tmp) \
|
| 374 |
|
|
: "r"(_period_) \
|
| 375 |
|
|
: "cc" \
|
| 376 |
|
|
); \
|
| 377 |
|
|
CYG_MACRO_END
|
| 378 |
|
|
|
| 379 |
|
|
#define HAL_CLOCK_READ( _pvalue_ ) \
|
| 380 |
|
|
CYG_MACRO_START \
|
| 381 |
|
|
register cyg_uint32 result; \
|
| 382 |
|
|
asm volatile( \
|
| 383 |
|
|
"mfdec %0;" \
|
| 384 |
|
|
: "=r"(result) \
|
| 385 |
|
|
); \
|
| 386 |
|
|
*(_pvalue_) = CYGNUM_KERNEL_COUNTERS_RTC_PERIOD-result; \
|
| 387 |
|
|
CYG_MACRO_END
|
| 388 |
|
|
|
| 389 |
|
|
#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY
|
| 390 |
|
|
#define HAL_CLOCK_LATENCY( _pvalue_ ) \
|
| 391 |
|
|
CYG_MACRO_START \
|
| 392 |
|
|
register cyg_int32 result; \
|
| 393 |
|
|
asm volatile( \
|
| 394 |
|
|
"mfdec %0;" \
|
| 395 |
|
|
: "=r"(result) \
|
| 396 |
|
|
); \
|
| 397 |
|
|
/* Pending DEC interrupts cannot be discarded. If dec is */ \
|
| 398 |
|
|
/* positive it''s because a DEC interrupt occured while */ \
|
| 399 |
|
|
/* eCos was getting ready to run. Just return 0 in that */ \
|
| 400 |
|
|
/* case. */ \
|
| 401 |
|
|
if (result > 0) \
|
| 402 |
|
|
result = 0; \
|
| 403 |
|
|
*(_pvalue_) = -result; \
|
| 404 |
|
|
CYG_MACRO_END
|
| 405 |
|
|
#endif
|
| 406 |
|
|
|
| 407 |
|
|
#ifndef HAL_DELAY_US
|
| 408 |
|
|
extern void hal_delay_us(int);
|
| 409 |
|
|
#define HAL_DELAY_US(n) hal_delay_us(n)
|
| 410 |
|
|
#endif
|
| 411 |
|
|
|
| 412 |
|
|
// The vector used by the Real time clock
|
| 413 |
|
|
#ifndef CYGNUM_HAL_INTERRUPT_RTC
|
| 414 |
|
|
#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_DECREMENTER
|
| 415 |
|
|
#endif // CYGNUM_HAL_INTERRUPT_RTC
|
| 416 |
|
|
|
| 417 |
|
|
#endif // CYGHWR_HAL_CLOCK_DEFINED
|
| 418 |
|
|
|
| 419 |
|
|
//--------------------------------------------------------------------------
|
| 420 |
|
|
// Variant functions
|
| 421 |
|
|
externC void hal_variant_IRQ_init(void);
|
| 422 |
|
|
|
| 423 |
|
|
//--------------------------------------------------------------------------
|
| 424 |
|
|
#endif // ifndef CYGONCE_HAL_INTR_H
|
| 425 |
|
|
// End of hal_intr.h
|
