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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [powerpc/] [csb281/] [v2_0/] [include/] [plf_intr.h] - Blame information for rev 174

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#ifndef CYGONCE_HAL_PLF_INTR_H
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#define CYGONCE_HAL_PLF_INTR_H
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//==========================================================================
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//
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//      plf_intr.h
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//
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//      CSB281 platform specific interrupt definitions
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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// Copyright (C) 2002 Gary Thomas
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    jskov
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// Contributors: jskov, gthomas
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// Date:         2000-06-13
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// Purpose:      Define platform specific interrupt support
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//              
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// Usage:
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//              #include <cyg/hal/plf_intr.h>
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//              ...
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//              
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <pkgconf/hal.h>
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#include <cyg/infra/cyg_type.h>
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//----------------------------------------------------------------------------
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// Platform specific interrupt mapping - interrupt vectors
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#define CYGNUM_HAL_INTERRUPT_IRQ0   0x02
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#define CYGNUM_HAL_INTERRUPT_IRQ1   0x03
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#define CYGNUM_HAL_INTERRUPT_IRQ2   0x04
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#define CYGNUM_HAL_INTERRUPT_IRQ3   0x05
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#define CYGNUM_HAL_INTERRUPT_IRQ4   0x06
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#define CYGNUM_HAL_INTERRUPT_UART0  0x07
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#define CYGNUM_HAL_INTERRUPT_UART1  0x08
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#define CYGNUM_HAL_INTERRUPT_TIMER0 0x09
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#define CYGNUM_HAL_INTERRUPT_TIMER1 0x0A
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#define CYGNUM_HAL_INTERRUPT_TIMER2 0x0B
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#define CYGNUM_HAL_INTERRUPT_TIMER3 0x0C
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#define CYGNUM_HAL_INTERRUPT_I2C    0x0D
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#define CYGNUM_HAL_INTERRUPT_DMA0   0x0E
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#define CYGNUM_HAL_INTERRUPT_DMA1   0x0F
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#define CYGNUM_HAL_INTERRUPT_MSG    0x10
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#define CYGNUM_HAL_ISR_MAX          0x10
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#define CYGNUM_HAL_INTERRUPT_PCI0   CYGNUM_HAL_INTERRUPT_IRQ0  // PCI slot 0 (disabled)
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#define CYGNUM_HAL_INTERRUPT_PCI1   CYGNUM_HAL_INTERRUPT_IRQ1  // PCI slot 1
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#define CYGNUM_HAL_INTERRUPT_LAN    CYGNUM_HAL_INTERRUPT_IRQ2  // Onboard GD82559
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#define CYGNUM_HAL_INTERRUPT_MOUSE  CYGNUM_HAL_INTERRUPT_IRQ3  // PS/2 mouse
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#define CYGNUM_HAL_INTERRUPT_KBD    CYGNUM_HAL_INTERRUPT_IRQ4  // PS/2 keyboard
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// Platform specific interrupt handling - using EPIC
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#define CYGHWR_HAL_INTERRUPT_CONTROLLER_ACCESS_DEFINED
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externC void hal_interrupt_mask(int);
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externC void hal_interrupt_unmask(int);
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externC void hal_interrupt_acknowledge(int);
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externC void hal_interrupt_configure(int, int, int);
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externC void hal_interrupt_set_level(int, int);
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#define HAL_INTERRUPT_MASK( _vector_ )                     \
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    hal_interrupt_mask( _vector_ )
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#define HAL_INTERRUPT_UNMASK( _vector_ )                   \
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    hal_interrupt_unmask( _vector_ )
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#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ )              \
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    hal_interrupt_acknowledge( _vector_ )
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#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) \
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    hal_interrupt_configure( _vector_, _level_, _up_ )
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#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ )       \
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    hal_interrupt_set_level( _vector_, _level_ )
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//--------------------------------------------------------------------------
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// Control-C support.
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// Defined by the quicc driver
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// #include <cyg/hal/quicc/quicc_smc1.h>
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//----------------------------------------------------------------------------
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// Reset.
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// The CSB281 does not have a watchdog (not one we can easily use for this
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// purpose anyway).
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#define HAL_PLATFORM_RESET() CYG_EMPTY_STATEMENT
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#define HAL_PLATFORM_RESET_ENTRY 0xfff00100
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//--------------------------------------------------------------------------
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#endif // ifndef CYGONCE_HAL_PLF_INTR_H
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// End of plf_intr.h

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