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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [powerpc/] [csb281/] [v2_0/] [include/] [plf_io.h] - Blame information for rev 565

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#ifndef CYGONCE_PLF_IO_H
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#define CYGONCE_PLF_IO_H
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//=============================================================================
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//
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//      plf_io.h
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//
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//      Platform specific IO support
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//
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//=============================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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// Copyright (C) 2002, 2003 Gary Thomas
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    hmt, jskov 
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// Contributors: hmt, jskov, gthomas
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// Date:         2002-07-23
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// Purpose:      Cogent CSB281 (PowerPC 8245) PCI IO support macros
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// Description: 
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// Usage:        #include <cyg/hal/plf_io.h>
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include CYGBLD_HAL_PLATFORM_H
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//#include CYGBLD_HAL_PLF_DEFS_H
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#include <cyg/hal/hal_io.h>             // IO macros
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#include <cyg/hal/plf_intr.h>           // Interrupt vectors
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//-----------------------------------------------------------------------------
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//
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// PCI support
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//
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#define _EOM (CYGMEM_REGION_ram+CYGMEM_REGION_ram_SIZE)
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#define _PCI_MAP 0x80000000
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#define CYGARC_PHYSICAL_ADDRESS(x) (((x) >= _PCI_MAP) ? ((x) & 0x0FFFFFFF) : (x))
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#define CYGARC_UNCACHED_ADDRESS(x) ((x) + _PCI_MAP)
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// Restrict device [slot] space
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#define CYG_PCI_MAX_BUS                       1  // Only one BUS
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#define CYG_PCI_MIN_DEV                      11  // Slots start at 11
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#define CYG_PCI_MAX_DEV                      14  // ... and end at 13
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//-----------------------------------------------------------------------------
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// Resources
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// Map PCI device resources starting from these addresses in PCI space.
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#define HAL_PCI_ALLOC_BASE_MEMORY                 0xF8000000
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#define HAL_PCI_ALLOC_BASE_IO                     0xFE800000
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// This is where the PCI spaces are mapped in the CPU's address space.
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#define HAL_PCI_PHYSICAL_MEMORY_BASE              0  // Address maps are 1-1
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#define HAL_PCI_PHYSICAL_IO_BASE                  0
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// shared memory segment
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#define CYGMEM_SECTION_pci_window                 CYGARC_UNCACHED_ADDRESS(CYGMEM_REGION_ram_SIZE)
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#define CYGMEM_SECTION_pci_window_SIZE            0x00100000
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// Initialize the PCI environment
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externC void _csb281_pci_init(void);
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#define HAL_PCI_INIT() \
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  _csb281_pci_init()
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// Translate the PCI interrupt requested by the device (INTA#, INTB#,
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// INTC# or INTD#) to the associated CPU interrupt (i.e., HAL vector).
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externC void _csb281_pci_translate_interrupt(int bus, int devfn, int *vec, int *valid);
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#define HAL_PCI_TRANSLATE_INTERRUPT( __bus, __devfn, __vec, __valid) \
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  _csb281_pci_translate_interrupt(__bus, __devfn, &__vec, &__valid)
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// Read a value from the PCI configuration space of the appropriate
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// size at an address composed from the bus, devfn and offset.
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externC cyg_uint8 _csb281_pci_cfg_read_uint8(int bus, int dev, int offset);
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#define HAL_PCI_CFG_READ_UINT8( __bus, __devfn, __offset, __val )  \
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  __val = _csb281_pci_cfg_read_uint8(__bus, __devfn, __offset)
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externC cyg_uint16 _csb281_pci_cfg_read_uint16(int bus, int dev, int offset);
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#define HAL_PCI_CFG_READ_UINT16( __bus, __devfn, __offset, __val )  \
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  __val = _csb281_pci_cfg_read_uint16(__bus, __devfn, __offset)
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externC cyg_uint32 _csb281_pci_cfg_read_uint32(int bus, int dev, int offset);
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#define HAL_PCI_CFG_READ_UINT32( __bus, __devfn, __offset, __val )  \
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  __val = _csb281_pci_cfg_read_uint32(__bus, __devfn, __offset)
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// Write a value to the PCI configuration space of the appropriate
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// size at an address composed from the bus, devfn and offset.
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externC void _csb281_pci_cfg_write_uint8(int bus, int dev, int offset, cyg_uint8 val);
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#define HAL_PCI_CFG_WRITE_UINT8( __bus, __devfn, __offset, __val ) \
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  _csb281_pci_cfg_write_uint8(__bus, __devfn, __offset, __val)
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externC void _csb281_pci_cfg_write_uint16(int bus, int dev, int offset, cyg_uint16 val);
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#define HAL_PCI_CFG_WRITE_UINT16( __bus, __devfn, __offset, __val ) \
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  _csb281_pci_cfg_write_uint16(__bus, __devfn, __offset, __val)
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externC void _csb281_pci_cfg_write_uint32(int bus, int dev, int offset, cyg_uint32 val);
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#define HAL_PCI_CFG_WRITE_UINT32( __bus, __devfn, __offset, __val ) \
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  _csb281_pci_cfg_write_uint32(__bus, __devfn, __offset, __val)
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static __inline__ unsigned long
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_le32(unsigned long val)
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{
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    return (((val & 0x000000FF) << 24) |
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            ((val & 0x0000FF00) <<  8) |
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            ((val & 0x00FF0000) >>  8) |
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            ((val & 0xFF000000) >> 24));
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}
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static __inline__ unsigned short
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_le16(unsigned short val)
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{
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    return (((val & 0x000000FF) << 8) |
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            ((val & 0x0000FF00) >> 8));
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}
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#define HAL_WRITE_UINT32LE(_addr_, _val_) \
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  HAL_WRITE_UINT32(_addr_, _le32(_val_))
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#define HAL_WRITE_UINT16LE(_addr_, _val_) \
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  HAL_WRITE_UINT16(_addr_, _le16(_val_))
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#define HAL_WRITE_UINT8LE(_addr_, _val_) \
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  HAL_WRITE_UINT8(_addr_, _val_)
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#define HAL_READ_UINT32LE(_addr_, _val_)        \
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  {                                             \
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      HAL_READ_UINT32(_addr_, _val_);           \
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      _val_ = _le32(_val_);                     \
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  }
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#define HAL_READ_UINT16LE(_addr_, _val_)        \
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  {                                             \
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      HAL_READ_UINT16(_addr_, _val_);           \
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      _val_ = _le16(_val_);                     \
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  }
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#define HAL_READ_UINT8LE(_addr_, _val_)        \
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  HAL_READ_UINT8(_addr_, _val_)
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//-----------------------------------------------------------------------------
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// end of plf_io.h
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#endif // CYGONCE_PLF_IO_H

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