OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [powerpc/] [fads/] [v2_0/] [cdl/] [hal_powerpc_fads.cdl] - Blame information for rev 27

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
# ====================================================================
2
#
3
#      hal_powerpc_fads.cdl
4
#
5
#      PowerPC/FADS board HAL package configuration data
6
#
7
# ====================================================================
8
#####ECOSGPLCOPYRIGHTBEGIN####
9
## -------------------------------------------
10
## This file is part of eCos, the Embedded Configurable Operating System.
11
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12
##
13
## eCos is free software; you can redistribute it and/or modify it under
14
## the terms of the GNU General Public License as published by the Free
15
## Software Foundation; either version 2 or (at your option) any later version.
16
##
17
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
20
## for more details.
21
##
22
## You should have received a copy of the GNU General Public License along
23
## with eCos; if not, write to the Free Software Foundation, Inc.,
24
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25
##
26
## As a special exception, if other files instantiate templates or use macros
27
## or inline functions from this file, or you compile this file and link it
28
## with other works to produce a work based on this file, this file does not
29
## by itself cause the resulting work to be covered by the GNU General Public
30
## License. However the source code for this file must still be made available
31
## in accordance with section (3) of the GNU General Public License.
32
##
33
## This exception does not invalidate any other reasons why a work based on
34
## this file might be covered by the GNU General Public License.
35
##
36
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37
## at http://sources.redhat.com/ecos/ecos-license/
38
## -------------------------------------------
39
#####ECOSGPLCOPYRIGHTEND####
40
# ====================================================================
41
######DESCRIPTIONBEGIN####
42
#
43
# Author(s):      jskov
44
# Original data:  bartv, khester
45
# Contributors:
46
# Date:           1999-11-02
47
#
48
#####DESCRIPTIONEND####
49
#
50
# ====================================================================
51
 
52
cdl_package CYGPKG_HAL_POWERPC_FADS {
53
    display       "Motorola FADS PowerPC evaluation board"
54
    parent        CYGPKG_HAL_POWERPC
55
    requires      CYGPKG_HAL_POWERPC_MPC8xx
56
    define_header hal_powerpc_fads.h
57
    include_dir   cyg/hal
58
    description   "
59
        The FADS HAL package provides the support needed to run
60
        eCos on a Motorola FADS board equipped with a PowerPC processor."
61
 
62
    compile       hal_diag.c hal_aux.c fads.S quicc_smc2.c
63
 
64
    # FIXME: Cannot enable this yet since too much support is missing.
65
    # implements    CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
66
 
67
    define_proc {
68
        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   "
69
        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H "
70
    }
71
 
72
    # Board doesn't have eCos GDB stub support yet.
73
    implements CYGINT_HAL_USE_ROM_MONITOR_UNSUPPORTED
74
 
75
    cdl_component CYG_HAL_STARTUP {
76
        display       "Startup type"
77
        flavor        data
78
        legal_values  {"RAM" "ROM"}
79
        default_value {"RAM"}
80
        no_define
81
        define -file system.h CYG_HAL_STARTUP
82
        description   "
83
           When targetting the FADS board for RAM bootstrap it is expected
84
           that the image will be downloaded via the Motorola MPC8BUG tool."
85
    }
86
 
87
   cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
88
       display      "Number of communication channels on the board"
89
       flavor       data
90
       calculated   1
91
   }
92
 
93
   cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {
94
       display          "Debug serial port"
95
       flavor data
96
       legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
97
       default_value    0
98
       description      "
99
           The FADS board has only one serial port. This option
100
           chooses which port will be used to connect to a host
101
           running GDB."
102
    }
103
 
104
    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {
105
        display          "Diagnostic serial port"
106
        flavor data
107
        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
108
        default_value    0
109
        description      "
110
           The FADS board has only one serial port.  This option
111
           chooses which port will be used for diagnostic output."
112
    }
113
 
114
    # Real-time clock/counter specifics
115
    cdl_component CYGNUM_HAL_RTC_CONSTANTS {
116
        display       "Real-time clock constants."
117
        description   "
118
            Period is busclock/16/100."
119
        flavor        none
120
 
121
        cdl_option CYGNUM_HAL_RTC_NUMERATOR {
122
            display       "Real-time clock numerator"
123
            flavor        data
124
            calculated    1000000000
125
        }
126
        cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
127
            display       "Real-time clock denominator"
128
            flavor        data
129
            calculated    100
130
        }
131
        cdl_option CYGNUM_HAL_RTC_PERIOD {
132
            display       "Real-time clock period"
133
            flavor        data
134
            calculated    20833
135
        }
136
    }
137
 
138
    cdl_component CYGBLD_GLOBAL_OPTIONS {
139
        display "Global build options"
140
        flavor  none
141
        parent  CYGPKG_NONE
142
        description   "
143
            Global build options including control over
144
            compiler flags, linker flags and choice of toolchain."
145
 
146
 
147
        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
148
            display "Global command prefix"
149
            flavor  data
150
            no_define
151
            default_value { "powerpc-eabi" }
152
            description "
153
                This option specifies the command prefix used when
154
                invoking the build tools."
155
        }
156
 
157
        cdl_option CYGBLD_GLOBAL_CFLAGS {
158
            display "Global compiler flags"
159
            flavor  data
160
            no_define
161
            default_value { "-msoft-float -mcpu=860 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }
162
            description   "
163
                This option controls the global compiler flags which
164
                are used to compile all packages by
165
                default. Individual packages may define
166
                options which override these global flags."
167
        }
168
 
169
        cdl_option CYGBLD_GLOBAL_LDFLAGS {
170
            display "Global linker flags"
171
            flavor  data
172
            no_define
173
            default_value { "-msoft-float -mcpu=860 -g -nostdlib -Wl,--gc-sections -Wl,-static" }
174
            description   "
175
                This option controls the global linker flags. Individual
176
                packages may define options which override these global flags."
177
        }
178
    }
179
 
180
    cdl_component CYGHWR_MEMORY_LAYOUT {
181
        display "Memory layout"
182
        flavor data
183
        no_define
184
        calculated { CYG_HAL_STARTUP == "RAM" ? "powerpc_fads_ram" : \
185
                                                "powerpc_fads_rom" }
186
 
187
        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
188
            display "Memory layout linker script fragment"
189
            flavor data
190
            no_define
191
            define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
192
            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \
193
                                                    "" }
194
        }
195
 
196
        cdl_option CYGHWR_MEMORY_LAYOUT_H {
197
            display "Memory layout header file"
198
            flavor data
199
            no_define
200
            define -file system.h CYGHWR_MEMORY_LAYOUT_H
201
            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \
202
                                                    "" }
203
        }
204
    }
205
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.