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#ifndef CYGONCE_VAR_INTR_H
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#define CYGONCE_VAR_INTR_H
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//=============================================================================
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//
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// var_intr.h
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//
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// Variant HAL interrupt and clock support
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//
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//=============================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): nickg
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// Contributors:nickg, jskov, jlarmour, hmt, gthomas
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// Date: 2000-04-02
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// Purpose: Variant interrupt support
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// Description: The macros defined here provide the HAL APIs for handling
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// interrupts and the clock on the PPC40x variant CPUs.
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// Usage: Is included via the architecture interrupt header:
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// #include <cyg/hal/hal_intr.h>
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// ...
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include <cyg/hal/plf_intr.h>
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// Special handling for additional exceptions
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#define CYGNUM_HAL_VECTOR_TIMERS 16 // Note: must handle all 3!
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#define CYGNUM_HAL_VECTOR_DATA_TLB_MISS 17
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#define CYGNUM_HAL_VECTOR_INSTR_TLB_MISS 18
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#define CYGNUM_HAL_VECTOR_DEBUG 32
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// No 'trace'/'single step' trap on this processor
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#define CYGNUM_HAL_NO_VECTOR_TRACE
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#define CYGNUM_HAL_VSR_MAX CYGNUM_HAL_VECTOR_DEBUG
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// Special handling for interrupts
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#define CYGHWR_HAL_INTERRUPT_CONTROLLER_ACCESS_DEFINED
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// Additional interrupt sources which are supported by the 40x
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#define CYGNUM_HAL_INTERRUPT_CRITICAL 2
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#define CYGNUM_HAL_INTERRUPT_SERIAL_RCV 3
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#define CYGNUM_HAL_INTERRUPT_SERIAL_XMT 4
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#define CYGNUM_HAL_INTERRUPT_JTAG_RCV 5
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#define CYGNUM_HAL_INTERRUPT_JTAG_XMT 6
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#define CYGNUM_HAL_INTERRUPT_DMA0 7
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#define CYGNUM_HAL_INTERRUPT_DMA1 8
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#define CYGNUM_HAL_INTERRUPT_DMA2 9
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#define CYGNUM_HAL_INTERRUPT_DMA3 10
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#define CYGNUM_HAL_INTERRUPT_EXT0 11
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#define CYGNUM_HAL_INTERRUPT_EXT1 12
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#define CYGNUM_HAL_INTERRUPT_EXT2 13
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#define CYGNUM_HAL_INTERRUPT_EXT3 14
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#define CYGNUM_HAL_INTERRUPT_EXT4 15
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#define CYGNUM_HAL_INTERRUPT_VAR_TIMER 16
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#define CYGNUM_HAL_INTERRUPT_FIXED_TIMER 17
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#define CYGNUM_HAL_INTERRUPT_WATCHDOG_TIMER 18
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#define CYGNUM_HAL_ISR_MAX CYGNUM_HAL_INTERRUPT_WATCHDOG_TIMER
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//--------------------------------------------------------------------------
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// Interrupt controller access
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externC void hal_ppc40x_interrupt_mask(int);
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externC void hal_ppc40x_interrupt_unmask(int);
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externC void hal_ppc40x_interrupt_acknowledge(int);
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externC void hal_ppc40x_interrupt_configure(int, int, int);
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externC void hal_ppc40x_interrupt_set_level(int, int);
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#define HAL_INTERRUPT_MASK( _vector_ ) \
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hal_ppc40x_interrupt_mask( _vector_ )
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#define HAL_INTERRUPT_UNMASK( _vector_ ) \
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hal_ppc40x_interrupt_unmask( _vector_ )
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#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \
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hal_ppc40x_interrupt_acknowledge( _vector_ )
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#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) \
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hal_ppc40x_interrupt_configure( _vector_, _level_, _up_ )
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#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) \
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hal_ppc40x_interrupt_set_level( _vector_, _level_ )
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//--------------------------------------------------------------------------
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// Clock control
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externC void hal_ppc40x_clock_initialize(cyg_uint32);
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externC void hal_ppc40x_clock_read(cyg_uint32 *);
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externC void hal_ppc40x_clock_reset(cyg_uint32, cyg_uint32);
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externC void hal_ppc40x_delay_us(int);
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#define CYGHWR_HAL_CLOCK_DEFINED
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#define HAL_CLOCK_INITIALIZE( _period_ ) hal_ppc40x_clock_initialize( _period_ )
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#define HAL_CLOCK_RESET( _vec_, _period_ ) hal_ppc40x_clock_reset( _vec_, _period_ )
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#define HAL_CLOCK_READ( _pvalue_ ) hal_ppc40x_clock_read( _pvalue_ )
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#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY
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#define HAL_CLOCK_LATENCY( _pvalue_ ) HAL_CLOCK_READ( (cyg_uint32 *)_pvalue_ )
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#endif
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#define HAL_DELAY_US(n) hal_ppc40x_delay_us(n)
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#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_VAR_TIMER
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//-----------------------------------------------------------------------------
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// Symbols used by assembly code
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#define CYGARC_VARIANT_DEFS \
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DEFINE(CYGNUM_HAL_VECTOR_TIMERS, CYGNUM_HAL_VECTOR_TIMERS); \
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DEFINE(CYGNUM_HAL_INTERRUPT_VAR_TIMER,CYGNUM_HAL_INTERRUPT_VAR_TIMER);
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//-----------------------------------------------------------------------------
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#endif // ifndef CYGONCE_VAR_INTR_H
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// End of var_intr.h
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