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#ifndef CYGONCE_HAL_VARIANT_INC
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#define CYGONCE_HAL_VARIANT_INC
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##=============================================================================
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##
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## variant.inc
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##
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## PPC60x family assembler header file
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##
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##=============================================================================
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#####ECOSGPLCOPYRIGHTBEGIN####
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## -------------------------------------------
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## This file is part of eCos, the Embedded Configurable Operating System.
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## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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## Copyright (C) 2002 Gary Thomas
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##
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## eCos is free software; you can redistribute it and/or modify it under
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## the terms of the GNU General Public License as published by the Free
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## Software Foundation; either version 2 or (at your option) any later version.
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##
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## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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## WARRANTY; without even the implied warranty of MERCHANTABILITY or
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## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License along
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## with eCos; if not, write to the Free Software Foundation, Inc.,
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## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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##
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## As a special exception, if other files instantiate templates or use macros
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## or inline functions from this file, or you compile this file and link it
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## with other works to produce a work based on this file, this file does not
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## by itself cause the resulting work to be covered by the GNU General Public
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## License. However the source code for this file must still be made available
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## in accordance with section (3) of the GNU General Public License.
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##
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## This exception does not invalidate any other reasons why a work based on
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## this file might be covered by the GNU General Public License.
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##
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## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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## at http://sources.redhat.com/ecos/ecos-license/
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## -------------------------------------------
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#####ECOSGPLCOPYRIGHTEND####
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##=============================================================================
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#######DESCRIPTIONBEGIN####
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##
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## Author(s): jskov
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## Contributors:jskov, gthomas
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## Date: 2000-02-04
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## Purpose: PPC60x family definitions.
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## Description: This file contains various definitions and macros that are
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## useful for writing assembly code for the PPC60x CPU family.
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## Usage:
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## #include
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## ...
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##
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##
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######DESCRIPTIONEND####
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##
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##=============================================================================
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#include
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#include
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#include
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##-----------------------------------------------------------------------------
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## PPC60x defined vectors
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.macro hal_extra_vectors
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exception_vector instruction_TLB
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exception_vector data_load_TLB
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exception_vector data_store_TLB
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exception_vector instruction_address_breakpoint
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exception_vector system_management_interrupt
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.endm
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##-----------------------------------------------------------------------------
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## PPC60x CPU initialization
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##
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## Initialize CPU to a post-reset state, ensuring the ground doesn''t
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## shift under us while we try to set things up.
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.macro hal_cpu_init
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# Set up MSR (disable MMU for now)
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lwi r3,(CYG_MSR & ~(MSR_IR | MSR_DR))
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sync
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mtmsr r3
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sync
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.endm
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##-----------------------------------------------------------------------------
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## PPC60x monitor initialization
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#ifndef CYGPKG_HAL_PPC_MON_DEFINED
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#if defined(CYG_HAL_STARTUP_ROM) || \
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( defined(CYG_HAL_STARTUP_RAM) && \
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!defined(CYGSEM_HAL_USE_ROM_MONITOR))
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.macro hal_mon_init
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#ifdef CYGSEM_HAL_POWERPC_COPY_VECTORS
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# If we are starting up from ROM and want vectors in RAM
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# or we are starting in RAM and NOT using a ROM monitor,
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# copy exception handler code to 0.
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lwi r3,rom_vectors # r3 = rom start
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lwi r4,0 # r4 = ram start
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lwi r5,rom_vectors_end # r5 = rom end
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cmplw r3,r5 # skip if no vectors
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beq 2f
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subi r3,r3,4
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subi r4,r4,4
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subi r5,r5,4
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1:
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lwzu r0,4(r3) # get word from ROM
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stwu r0,4(r4) # store in RAM
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cmplw r3,r5 # compare
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blt 1b # loop if not yet done
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2:
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#endif
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# Next initialize the VSR table. This happens whether the
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# vectors were copied to RAM or not.
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# First fill with exception handlers
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lwi r3,cyg_hal_default_exception_vsr
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lwi r4,hal_vsr_table
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subi r4,r4,4
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li r5,CYGNUM_HAL_VSR_COUNT
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1: stwu r3,4(r4)
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subi r5,r5,1
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cmpwi r5,0
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bne 1b
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# Then fill in the special vectors
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lwi r3,cyg_hal_default_interrupt_vsr
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lwi r4,hal_vsr_table
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stw r3,CYGNUM_HAL_VECTOR_INTERRUPT*4(r4)
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stw r3,CYGNUM_HAL_VECTOR_DECREMENTER*4(r4)
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.endm
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#elif defined(CYG_HAL_STARTUP_RAM) && defined(CYGSEM_HAL_USE_ROM_MONITOR)
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# Initialize the VSR table entries
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# We only take control of the interrupt vectors,
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# the rest are left to the ROM for now...
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.macro hal_mon_init
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lwi r3,cyg_hal_default_interrupt_vsr
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lwi r4,hal_vsr_table
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stw r3,CYGNUM_HAL_VECTOR_INTERRUPT*4(r4)
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stw r3,CYGNUM_HAL_VECTOR_DECREMENTER*4(r4)
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.endm
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#else
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.macro hal_mon_init
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.endm
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#endif
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#define CYGPKG_HAL_PPC_MON_DEFINED
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#endif // CYGPKG_HAL_PPC_MON_DEFINED
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##-----------------------------------------------------------------------------
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## PPC60x exception state handling
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.macro hal_variant_save regs
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.endm
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.macro hal_variant_load regs
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.endm
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##-----------------------------------------------------------------------------
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## Indicate that the ISR tables are defined in variant.S
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#define CYG_HAL_PPC_ISR_TABLES_DEFINED
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#------------------------------------------------------------------------------
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#endif // ifndef CYGONCE_HAL_VARIANT_INC
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# end of variant.inc
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