OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [powerpc/] [sim/] [v2_0/] [cdl/] [hal_powerpc_sim.cdl] - Blame information for rev 565

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
# ====================================================================
2
#
3
#      hal_powerpc_sim.cdl
4
#
5
#      PSIM HAL package configuration data
6
#
7
# ====================================================================
8
#####ECOSGPLCOPYRIGHTBEGIN####
9
## -------------------------------------------
10
## This file is part of eCos, the Embedded Configurable Operating System.
11
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12
##
13
## eCos is free software; you can redistribute it and/or modify it under
14
## the terms of the GNU General Public License as published by the Free
15
## Software Foundation; either version 2 or (at your option) any later version.
16
##
17
## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18
## WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
20
## for more details.
21
##
22
## You should have received a copy of the GNU General Public License along
23
## with eCos; if not, write to the Free Software Foundation, Inc.,
24
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25
##
26
## As a special exception, if other files instantiate templates or use macros
27
## or inline functions from this file, or you compile this file and link it
28
## with other works to produce a work based on this file, this file does not
29
## by itself cause the resulting work to be covered by the GNU General Public
30
## License. However the source code for this file must still be made available
31
## in accordance with section (3) of the GNU General Public License.
32
##
33
## This exception does not invalidate any other reasons why a work based on
34
## this file might be covered by the GNU General Public License.
35
##
36
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37
## at http://sources.redhat.com/ecos/ecos-license/
38
## -------------------------------------------
39
#####ECOSGPLCOPYRIGHTEND####
40
# ====================================================================
41
######DESCRIPTIONBEGIN####
42
#
43
# Author(s):      jskov
44
# Original data:  bartv
45
# Contributors:
46
# Date:           1999-11-02
47
#
48
#####DESCRIPTIONEND####
49
#
50
# ====================================================================
51
 
52
cdl_package CYGPKG_HAL_POWERPC_SIM {
53
    display       "PSIM minimal simulator"
54
    parent        CYGPKG_HAL_POWERPC
55
    requires      CYGPKG_HAL_POWERPC_PPC60x
56
    requires      { CYGSEM_HAL_USE_ROM_MONITOR==0 }
57
    define_header hal_powerpc_sim.h
58
    include_dir   cyg/hal
59
    description   "
60
        The minimal simulator HAL package is provided for use when
61
        only a simple simulation of the processor architecture is
62
        desired, as opposed to detailed simulation of any specific
63
        board. In particular it is not possible to simulate any of
64
        the I/O devices, so device drivers cannot be used."
65
 
66
    compile       sim.S hal_aux.c
67
 
68
    implements CYGINT_HAL_DEBUG_GDB_CTRLC_UNSUPPORTED
69
 
70
    define_proc {
71
        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   "
72
        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H "
73
    }
74
 
75
    cdl_component CYG_HAL_STARTUP {
76
        display       "Startup type"
77
        flavor        data
78
        legal_values  {"RAM"}
79
        default_value {"RAM"}
80
        no_define
81
        define -file system.h CYG_HAL_STARTUP
82
        description   "
83
            Only RAM startup is supported at the moment."
84
    }
85
 
86
    cdl_option CYGHWR_HAL_POWERPC_FORCE_VECTORS {
87
        display       "Force creation of vectors section."
88
        calculated    1
89
    }
90
 
91
    cdl_option CYGHWR_HAL_POWERPC_DISABLE_MMU {
92
        display       "Run with MMU disabled."
93
        calculated    1
94
        no_define
95
        description   "
96
            When building for SIM, don't enable MMU -- it's not needed
97
            since caches are disabled, and there is a runtime simulation
98
            overhead."
99
    }
100
 
101
    # Real-time clock/counter specifics
102
    cdl_component CYGNUM_HAL_RTC_CONSTANTS {
103
        display       "Real-time clock constants."
104
        flavor        none
105
 
106
        cdl_option CYGNUM_HAL_RTC_NUMERATOR {
107
            display       "Real-time clock numerator"
108
            flavor        data
109
            calculated    1000000000
110
        }
111
        cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
112
            display       "Real-time clock denominator"
113
            flavor        data
114
            calculated    100
115
        }
116
        cdl_option CYGNUM_HAL_RTC_PERIOD {
117
            display       "Real-time clock period"
118
            flavor        data
119
            calculated    9999
120
        }
121
    }
122
 
123
    cdl_component CYGBLD_GLOBAL_OPTIONS {
124
        display "Global build options"
125
        flavor  none
126
        parent  CYGPKG_NONE
127
        description   "
128
            Global build options including control over
129
            compiler flags, linker flags and choice of toolchain."
130
 
131
 
132
        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
133
            display "Global command prefix"
134
            flavor  data
135
            no_define
136
            default_value { "powerpc-eabi" }
137
            description "
138
                This option specifies the command prefix used when
139
                invoking the build tools."
140
        }
141
 
142
        cdl_option CYGBLD_GLOBAL_CFLAGS {
143
            display "Global compiler flags"
144
            flavor  data
145
            no_define
146
            default_value { "-mcpu=603 -msoft-float -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }
147
            description   "
148
                This option controls the global compiler flags which
149
                are used to compile all packages by
150
                default. Individual packages may define
151
                options which override these global flags."
152
        }
153
 
154
        cdl_option CYGBLD_GLOBAL_LDFLAGS {
155
            display "Global linker flags"
156
            flavor  data
157
            no_define
158
            default_value { "-mcpu=603 -msoft-float -g -nostdlib -Wl,--gc-sections -Wl,-static" }
159
            description   "
160
                This option controls the global linker flags. Individual
161
                packages may define options which override these global flags."
162
        }
163
    }
164
 
165
    cdl_component CYGHWR_MEMORY_LAYOUT {
166
        display "Memory layout"
167
        flavor data
168
        no_define
169
        calculated { "powerpc_sim_ram" }
170
 
171
        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
172
            display "Memory layout linker script fragment"
173
            flavor data
174
            no_define
175
            define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
176
            calculated { "" }
177
        }
178
 
179
        cdl_option CYGHWR_MEMORY_LAYOUT_H {
180
            display "Memory layout header file"
181
            flavor data
182
            no_define
183
            define -file system.h CYGHWR_MEMORY_LAYOUT_H
184
            calculated { "" }
185
        }
186
    }
187
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.