1 |
27 |
unneback |
//=============================================================================
|
2 |
|
|
//
|
3 |
|
|
// hal_aux.c
|
4 |
|
|
//
|
5 |
|
|
// HAL auxiliary objects and code; per platform
|
6 |
|
|
//
|
7 |
|
|
//=============================================================================
|
8 |
|
|
//####ECOSGPLCOPYRIGHTBEGIN####
|
9 |
|
|
// -------------------------------------------
|
10 |
|
|
// This file is part of eCos, the Embedded Configurable Operating System.
|
11 |
|
|
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
|
12 |
|
|
// Copyright (C) 2002 Gary Thomas
|
13 |
|
|
//
|
14 |
|
|
// eCos is free software; you can redistribute it and/or modify it under
|
15 |
|
|
// the terms of the GNU General Public License as published by the Free
|
16 |
|
|
// Software Foundation; either version 2 or (at your option) any later version.
|
17 |
|
|
//
|
18 |
|
|
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
|
19 |
|
|
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
20 |
|
|
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
21 |
|
|
// for more details.
|
22 |
|
|
//
|
23 |
|
|
// You should have received a copy of the GNU General Public License along
|
24 |
|
|
// with eCos; if not, write to the Free Software Foundation, Inc.,
|
25 |
|
|
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
|
26 |
|
|
//
|
27 |
|
|
// As a special exception, if other files instantiate templates or use macros
|
28 |
|
|
// or inline functions from this file, or you compile this file and link it
|
29 |
|
|
// with other works to produce a work based on this file, this file does not
|
30 |
|
|
// by itself cause the resulting work to be covered by the GNU General Public
|
31 |
|
|
// License. However the source code for this file must still be made available
|
32 |
|
|
// in accordance with section (3) of the GNU General Public License.
|
33 |
|
|
//
|
34 |
|
|
// This exception does not invalidate any other reasons why a work based on
|
35 |
|
|
// this file might be covered by the GNU General Public License.
|
36 |
|
|
//
|
37 |
|
|
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
|
38 |
|
|
// at http://sources.redhat.com/ecos/ecos-license/
|
39 |
|
|
// -------------------------------------------
|
40 |
|
|
//####ECOSGPLCOPYRIGHTEND####
|
41 |
|
|
//=============================================================================
|
42 |
|
|
//#####DESCRIPTIONBEGIN####
|
43 |
|
|
//
|
44 |
|
|
// Author(s): hmt
|
45 |
|
|
// Contributors:hmt
|
46 |
|
|
// Date: 1999-06-08
|
47 |
|
|
// Purpose: HAL aux objects: startup tables.
|
48 |
|
|
// Description: Tables for per-platform initialization
|
49 |
|
|
//
|
50 |
|
|
//####DESCRIPTIONEND####
|
51 |
|
|
//
|
52 |
|
|
//=============================================================================
|
53 |
|
|
|
54 |
|
|
#include <pkgconf/hal.h>
|
55 |
|
|
#include <cyg/hal/hal_mem.h> // HAL memory definitions
|
56 |
|
|
#include <cyg/infra/cyg_type.h>
|
57 |
|
|
|
58 |
|
|
// The memory map is weakly defined, allowing the application to redefine
|
59 |
|
|
// it if necessary. The regions defined below are the minimum requirements.
|
60 |
|
|
CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = {
|
61 |
|
|
// Mapping for the Motorola MPC8260 development board
|
62 |
|
|
CYGARC_MEMDESC_CACHE( 0x00000000, 0x01000000 ), // Main memory 60x SDRAM
|
63 |
|
|
CYGARC_MEMDESC_NOCACHEGUARD( 0x04000000, 0x00400000 ), // Local Bus SDRAM
|
64 |
|
|
// The BCSR are actually only 8 registers, but they repeatedly map
|
65 |
|
|
// into the 1 MB space described here.
|
66 |
|
|
// The BAT register uses a Block Length of 4MB so that both the BCSRs
|
67 |
|
|
// and the IMMR space is Managed thru the MMU. In fact, the ATM UNI
|
68 |
|
|
// Proc. Control is also mapped into this block.
|
69 |
|
|
// See MPC8260 PowerQUICC II ADS User's Manual, p. 3-35, note 2
|
70 |
|
|
CYGARC_MEMDESC_NOCACHE( 0x04500000, 0x00400000 ), // BCSR registers
|
71 |
|
|
CYGARC_MEMDESC_NOCACHE( 0xff800000, 0x00800000 ), // ROM region
|
72 |
|
|
|
73 |
|
|
CYGARC_MEMDESC_TABLE_END
|
74 |
|
|
};
|
75 |
|
|
|
76 |
|
|
static volatile CYG_WORD *BCSR0 = (CYG_WORD *)0x04500000;
|
77 |
|
|
static volatile CYG_WORD *BCSR1 = (CYG_WORD *)0x04500004;
|
78 |
|
|
static volatile CYG_WORD *BCSR2 = (CYG_WORD *)0x04500008;
|
79 |
|
|
|
80 |
|
|
// Some macros used for debugging
|
81 |
|
|
#define GREEN_LED_ON (*BCSR0 &= 0xFDFFFFFF)
|
82 |
|
|
#define RED_LED_OFF (*BCSR0 |= 0x01000000)
|
83 |
|
|
#define GREEN_LED_OFF (*BCSR0 |= 0x02000000)
|
84 |
|
|
#define RED_LED_ON (*BCSR0 &= 0xFEFFFFFF)
|
85 |
|
|
|
86 |
|
|
//--------------------------------------------------------------------------
|
87 |
|
|
// Platform init code.
|
88 |
|
|
void
|
89 |
|
|
hal_platform_init(void)
|
90 |
|
|
{
|
91 |
|
|
/*----------------------------------------------------------------------*/
|
92 |
|
|
/* Enable RS232 interface on the VADS board via BCSR1. BCSR1 is a Board */
|
93 |
|
|
/* Control and Status Register that resides in a programmable logic */
|
94 |
|
|
/* device. */
|
95 |
|
|
/*----------------------------------------------------------------------*/
|
96 |
|
|
|
97 |
|
|
//*BCSR1 &= 0xFFFFFFFD; /* Assert the RS232EN_1/ bit */
|
98 |
|
|
/* The Pilot revision of the MPC8260ADS board has moved the 8 bits
|
99 |
|
|
* in the 32 bit BCSR0 and BCSR1 from D24-D31 to D0-D7.
|
100 |
|
|
*/
|
101 |
|
|
*BCSR1 &= 0xFDFFFFFF; /* Assert the RS232EN_1/ bit */
|
102 |
|
|
|
103 |
|
|
hal_if_init();
|
104 |
|
|
}
|
105 |
|
|
|
106 |
|
|
// EOF hal_aux.c
|