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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [powerpc/] [vads/] [v2_0/] [src/] [hal_aux.c] - Blame information for rev 737

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//=============================================================================
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//
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//      hal_aux.c
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//
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//      HAL auxiliary objects and code; per platform
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//
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//=============================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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// Copyright (C) 2002 Gary Thomas
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):   hmt
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// Contributors:hmt
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// Date:        1999-06-08
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// Purpose:     HAL aux objects: startup tables.
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// Description: Tables for per-platform initialization
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include <pkgconf/hal.h>
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#include <cyg/hal/hal_mem.h>            // HAL memory definitions
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#include <cyg/infra/cyg_type.h>
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// The memory map is weakly defined, allowing the application to redefine
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// it if necessary. The regions defined below are the minimum requirements.
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CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = {
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    // Mapping for the Motorola MPC8260 development board
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    CYGARC_MEMDESC_CACHE( 0x00000000, 0x01000000 ), // Main memory 60x SDRAM
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    CYGARC_MEMDESC_NOCACHEGUARD( 0x04000000, 0x00400000 ), // Local Bus SDRAM
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    // The BCSR are actually only 8 registers, but they repeatedly map
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    // into the 1 MB space described here.
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    // The BAT register uses a Block Length of 4MB so that both the BCSRs
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    // and the IMMR space is Managed thru the MMU.  In fact, the ATM UNI
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    // Proc. Control is also mapped into this block.
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    // See MPC8260 PowerQUICC II ADS User's Manual, p. 3-35, note 2
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    CYGARC_MEMDESC_NOCACHE( 0x04500000, 0x00400000 ), // BCSR registers
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    CYGARC_MEMDESC_NOCACHE( 0xff800000, 0x00800000 ), // ROM region
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    CYGARC_MEMDESC_TABLE_END
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};
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static volatile CYG_WORD  *BCSR0 = (CYG_WORD *)0x04500000;
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static volatile CYG_WORD  *BCSR1 = (CYG_WORD *)0x04500004;
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static volatile CYG_WORD  *BCSR2 = (CYG_WORD *)0x04500008;
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// Some macros used for debugging
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#define GREEN_LED_ON  (*BCSR0 &= 0xFDFFFFFF)
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#define RED_LED_OFF   (*BCSR0 |= 0x01000000)
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#define GREEN_LED_OFF (*BCSR0 |= 0x02000000)
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#define RED_LED_ON    (*BCSR0 &= 0xFEFFFFFF)
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//--------------------------------------------------------------------------
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// Platform init code.
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void
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hal_platform_init(void)
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{
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   /*----------------------------------------------------------------------*/
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   /* Enable RS232 interface on the VADS board via BCSR1. BCSR1 is a Board */
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   /* Control and Status Register that resides in a programmable logic     */
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   /* device.                                                              */
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   /*----------------------------------------------------------------------*/
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   //*BCSR1 &= 0xFFFFFFFD;  /* Assert the RS232EN_1/ bit */
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   /* The Pilot revision of the MPC8260ADS board has moved the 8 bits
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    * in the 32 bit BCSR0 and BCSR1 from D24-D31 to D0-D7.
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    */
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   *BCSR1 &= 0xFDFFFFFF;  /* Assert the RS232EN_1/ bit */
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    hal_if_init();
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}
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// EOF hal_aux.c

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