OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [powerpc/] [vads/] [v2_0/] [src/] [hal_diag.c] - Blame information for rev 307

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
//=============================================================================
2
//
3
//      hal_diag.c
4
//
5
//      HAL diagnostic output code
6
//
7
//=============================================================================
8
//####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12
// Copyright (C) 2002 Gary Thomas
13
//
14
// eCos is free software; you can redistribute it and/or modify it under
15
// the terms of the GNU General Public License as published by the Free
16
// Software Foundation; either version 2 or (at your option) any later version.
17
//
18
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
19
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
20
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
21
// for more details.
22
//
23
// You should have received a copy of the GNU General Public License along
24
// with eCos; if not, write to the Free Software Foundation, Inc.,
25
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
26
//
27
// As a special exception, if other files instantiate templates or use macros
28
// or inline functions from this file, or you compile this file and link it
29
// with other works to produce a work based on this file, this file does not
30
// by itself cause the resulting work to be covered by the GNU General Public
31
// License. However the source code for this file must still be made available
32
// in accordance with section (3) of the GNU General Public License.
33
//
34
// This exception does not invalidate any other reasons why a work based on
35
// this file might be covered by the GNU General Public License.
36
//
37
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
38
// at http://sources.redhat.com/ecos/ecos-license/
39
// -------------------------------------------
40
//####ECOSGPLCOPYRIGHTEND####
41
//=============================================================================
42
//#####DESCRIPTIONBEGIN####
43
//
44
// Author(s):   hmt
45
// Contributors:hmt, jskov
46
// Date:        1999-06-08
47
// Purpose:     HAL diagnostic output
48
// Description: Implementations of HAL diagnostic output support.
49
//
50
//####DESCRIPTIONEND####
51
//
52
//=============================================================================
53
 
54
#include <pkgconf/hal.h>
55
 
56
#include <cyg/infra/cyg_type.h>         // base types
57
#include <cyg/infra/cyg_trac.h>         // tracing macros
58
#include <cyg/infra/cyg_ass.h>          // assertion macros
59
 
60
#include <cyg/hal/hal_io.h>             // IO macros
61
#include <cyg/hal/hal_diag.h>
62
#include <cyg/hal/hal_intr.h>           // Interrupt macros
63
 
64
#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
65
#include <cyg/hal/hal_stub.h>           // hal_output_gdb_string
66
#endif
67
 
68
#include <cyg/hal/ppc_regs.h>
69
#include <cyg/hal/mpc8260.h>
70
#ifdef CYGPKG_HAL_QUICC
71
#include <cyg/hal/quicc/quicc_smc1.h>
72
#endif
73
 
74
// This prototype probably needs to be in an include file
75
void
76
cyg_hal_plf_serial_init(void);
77
 
78
 
79
void
80
cyg_hal_plf_comms_init(void)
81
{
82
    static int initialized = 0;
83
 
84
    if (initialized)
85
        return;
86
    initialized = 1;
87
 
88
/* This is where I will put the SCC1 initialization code */
89
#define PF_ADDING_VIRTUAL_VECTORS
90
#ifdef PF_ADDING_VIRTUAL_VECTORS
91
    cyg_hal_plf_serial_init();
92
#else
93
# ifdef CYGPKG_HAL_QUICC
94
    cyg_hal_plf_serial_init();
95
# endif
96
#endif
97
}
98
 
99
 
100
#ifdef LATER
101
#if !defined(CYGSEM_HAL_VIRTUAL_VECTOR_DIAG)
102
 
103
//-----------------------------------------------------------------------------
104
// Select default diag channel to use
105
 
106
//#define CYG_KERNEL_DIAG_ROMART
107
//#define CYG_KERNEL_DIAG_SERIAL
108
 
109
#if !defined(CYG_KERNEL_DIAG_SERIAL)
110
#define CYG_KERNEL_DIAG_SERIAL
111
#endif
112
 
113
#ifdef CYGDBG_DIAG_BUF
114
// Keep diag messages in a buffer for later [re]display
115
 
116
int enable_diag_uart = 1;
117
int enable_diag_buf = 1;
118
static char diag_buf[40960*4];
119
static int  diag_buf_ptr = 0;
120
 
121
static void
122
diag_putc(char c)
123
{
124
    if (enable_diag_buf) {
125
        diag_buf[diag_buf_ptr++] = c;
126
        if (diag_buf_ptr == sizeof(diag_buf)) diag_buf_ptr--;
127
    }
128
}
129
 
130
void
131
dump_diag_buf(int start, int len)
132
{
133
    int i;
134
    enable_diag_uart = 1;
135
    enable_diag_buf = 0;
136
    if (len == 0) len = diag_buf_ptr;
137
    diag_printf("\nDiag buf\n");
138
    for (i = start;  i < len;  i++) {
139
        hal_diag_write_char(diag_buf[i]);
140
    }
141
}
142
#endif // CYGDBG_DIAG_BUF
143
 
144
 
145
//-----------------------------------------------------------------------------
146
// MBX board specific serial output; using GDB protocol by default:
147
 
148
 
149
#if defined(CYG_KERNEL_DIAG_SERIAL)
150
 
151
t_PQ2IMM *IMM;
152
 
153
void hal_diag_init(void)
154
{
155
    static int init = 0;
156
    if (init) return;
157
    init++;
158
 
159
    // hardwired base
160
    //eppc = eppc_base();
161
    IMM = (t_PQ2IMM *) 0x04700000;
162
 
163
    // init the actual serial port
164
    cyg_hal_plf_serial_init_channel();
165
#ifdef CYGSEM_HAL_DIAG_MANGLER_GDB
166
#ifndef CYG_HAL_STARTUP_ROM
167
    // We are talking to GDB; ack the "go" packet!
168
    cyg_hal_plf_serial_putc('+');
169
#endif
170
#endif
171
}
172
 
173
void hal_diag_write_char_serial( char c )
174
{
175
    unsigned long __state;
176
    HAL_DISABLE_INTERRUPTS(__state);
177
    cyg_hal_plf_serial_putc(c);
178
    HAL_RESTORE_INTERRUPTS(__state);
179
}
180
 
181
#if defined(CYG_HAL_STARTUP_ROM) || !defined(CYGDBG_HAL_DIAG_TO_DEBUG_CHAN)
182
void hal_diag_write_char(char c)
183
{
184
#ifdef CYGDBG_DIAG_BUF
185
    diag_putc(c);
186
    if (!enable_diag_uart) return;
187
#endif // CYGDBG_DIAG_BUF
188
    hal_diag_write_char_serial(c);
189
}
190
 
191
#else // RAM start so encode for GDB
192
 
193
void hal_diag_write_char(char c)
194
{
195
    static char line[100];
196
    static int pos = 0;
197
 
198
#ifdef CYGDBG_DIAG_BUF
199
    diag_putc(c);
200
    if (!enable_diag_uart) return;
201
#endif // CYGDBG_DIAG_BUF
202
 
203
    // No need to send CRs
204
    if( c == '\r' ) return;
205
 
206
    line[pos++] = c;
207
 
208
    if( c == '\n' || pos == sizeof(line) )
209
    {
210
        CYG_INTERRUPT_STATE old;
211
 
212
        // Disable interrupts. This prevents GDB trying to interrupt us
213
        // while we are in the middle of sending a packet. The serial
214
        // receive interrupt will be seen when we re-enable interrupts
215
        // later.
216
 
217
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
218
        CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old);
219
#else
220
        HAL_DISABLE_INTERRUPTS(old);
221
#endif
222
 
223
        while(1)
224
        {
225
            static char hex[] = "0123456789ABCDEF";
226
            cyg_uint8 csum = 0;
227
            int i;
228
 
229
            hal_diag_write_char_serial('$');
230
            hal_diag_write_char_serial('O');
231
            csum += 'O';
232
            for( i = 0; i < pos; i++ )
233
            {
234
                char ch = line[i];
235
                char h = hex[(ch>>4)&0xF];
236
                char l = hex[ch&0xF];
237
                hal_diag_write_char_serial(h);
238
                hal_diag_write_char_serial(l);
239
                csum += h;
240
                csum += l;
241
            }
242
            hal_diag_write_char_serial('#');
243
            hal_diag_write_char_serial(hex[(csum>>4)&0xF]);
244
            hal_diag_write_char_serial(hex[csum&0xF]);
245
 
246
#ifndef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
247
            // only gobble characters if no interrupt handler to grab ^Cs
248
            // is installed (which is exclusive with device driver use)
249
 
250
            // Wait for the ACK character '+' from GDB here and handle
251
            // receiving a ^C instead.  This is the reason for this clause
252
            // being a loop.
253
            c = cyg_hal_plf_serial_getc(eppc);
254
 
255
            if( c == '+' )
256
                break;              // a good acknowledge
257
#if 0
258
            if( c1 == 3 ) {
259
                // Ctrl-C: breakpoint.
260
                breakpoint();
261
                break;
262
            }
263
#endif
264
            // otherwise, loop round again
265
#else
266
            break;
267
#endif
268
        }
269
 
270
        pos = 0;
271
 
272
        // And re-enable interrupts
273
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
274
        CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old);
275
#else
276
        HAL_RESTORE_INTERRUPTS(old);
277
#endif
278
 
279
    }
280
}
281
#endif // NOT def CYG_HAL_STARTUP_ROM
282
 
283
#if 0
284
// These should not need to be prototyped here, but where????
285
cyg_uint8
286
cyg_hal_plf_serial_getc(void* __ch_data);
287
 
288
void
289
cyg_hal_plf_serial_putc(void* __ch_data, cyg_uint8 ch);
290
#endif
291
 
292
void hal_diag_read_char(char *c)
293
{
294
    *c = cyg_hal_plf_serial_getc();
295
}
296
 
297
#endif // CYG_KERNEL_DIAG_SERIAL
298
 
299
#endif // CYGSEM_HAL_VIRTUAL_VECTOR_DIAG
300
#endif
301
 
302
// EOF hal_diag.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.