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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [powerpc/] [viper/] [v2_0/] [cdl/] [hal_powerpc_viper.cdl] - Blame information for rev 27

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# ====================================================================
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#
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#      hal_powerpc_viper.cdl
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#
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#      PowerPC/VIPER board HAL package configuration data
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#
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# ====================================================================
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#####ECOSGPLCOPYRIGHTBEGIN####
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## -------------------------------------------
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## This file is part of eCos, the Embedded Configurable Operating System.
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## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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## Copyright (C) 2002 Gary Thomas
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##
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## eCos is free software; you can redistribute it and/or modify it under
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## the terms of the GNU General Public License as published by the Free
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## Software Foundation; either version 2 or (at your option) any later version.
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##
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## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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## WARRANTY; without even the implied warranty of MERCHANTABILITY or
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## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License along
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## with eCos; if not, write to the Free Software Foundation, Inc.,
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## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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##
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## As a special exception, if other files instantiate templates or use macros
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## or inline functions from this file, or you compile this file and link it
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## with other works to produce a work based on this file, this file does not
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## by itself cause the resulting work to be covered by the GNU General Public
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## License. However the source code for this file must still be made available
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## in accordance with section (3) of the GNU General Public License.
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##
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## This exception does not invalidate any other reasons why a work based on
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## this file might be covered by the GNU General Public License.
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##
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## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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## at http://sources.redhat.com/ecos/ecos-license/
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## -------------------------------------------
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#####ECOSGPLCOPYRIGHTEND####
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# ====================================================================
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######DESCRIPTIONBEGIN####
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#
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# Author(s):      jskov
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# Original data:  hmt
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# Contributors:   gthomas
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# Date:           1999-11-02
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#
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#####DESCRIPTIONEND####
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#
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# ====================================================================
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cdl_package CYGPKG_HAL_POWERPC_VIPER {
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    display       "A&M VIPER PowerPC evaluation board"
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    parent        CYGPKG_HAL_POWERPC
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    requires      CYGPKG_HAL_POWERPC_MPC8xx
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    define_header hal_powerpc_viper.h
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    include_dir   cyg/hal
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    description   "
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        The VIPER HAL package provides the support needed to run
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        eCos on a A&M VIPER board equipped with a PowerPC processor."
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    compile       hal_diag.c hal_aux.c viper.S
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    implements    CYGINT_HAL_DEBUG_GDB_STUBS
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    implements    CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
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    implements    CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
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    implements    CYGNUM_HAL_QUICC_SMC1
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    implements    CYGNUM_HAL_QUICC_SCC1
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    define_proc {
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        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   "
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        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H "
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        puts $::cdl_header "#define HAL_PLATFORM_CPU    \"PowerPC 860\""
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        puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"A&M VIPER\""
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        puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"\""
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    }
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    cdl_component CYG_HAL_STARTUP {
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        display       "Startup type"
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        flavor        data
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        legal_values  {"RAM" "ROM" "ROMRAM"}
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        default_value {"RAM"}
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        no_define
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        define -file system.h CYG_HAL_STARTUP
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        description   "
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           This option is used to control where the application program will
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           run, either from RAM or ROM (flash) memory.  ROM based applications
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           must be self contained, while RAM applications will typically assume
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           the existence of a debug environment, such as GDB stubs."
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    }
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    cdl_option CYGHWR_HAL_POWERPC_BOARD_SPEED {
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        display          "Development board clock speed (MHz)"
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        flavor           data
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        legal_values     { 47 51 55 59 63 }
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        default_value    63
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        description      "
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           VIPER Development Boards have various system clock speeds
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           depending on the processor fitted.  Select the clock speed
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           appropriate for your board so that the system can set the serial
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           baud rate correctly, amongst other things."
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   }
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    # Real-time clock/counter specifics
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    cdl_component CYGNUM_HAL_RTC_CONSTANTS {
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        display       "Real-time clock constants."
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        description   "
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            Period is busclock/16/100."
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        flavor        none
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        cdl_option CYGNUM_HAL_RTC_NUMERATOR {
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            display       "Real-time clock numerator"
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            flavor        data
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            calculated    1000000000
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        }
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        cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
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            display       "Real-time clock denominator"
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            flavor        data
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            calculated    100
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        }
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        cdl_option CYGNUM_HAL_RTC_PERIOD {
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            display       "Real-time clock period"
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            flavor        data
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            calculated    { ((((CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/4)/16)/100) }
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        }
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    }
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    cdl_component CYGBLD_GLOBAL_OPTIONS {
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        display "Global build options"
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        flavor  none
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        description   "
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            Global build options including control over
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            compiler flags, linker flags and choice of toolchain."
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        parent  CYGPKG_NONE
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        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
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            display "Global command prefix"
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            flavor  data
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            no_define
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            default_value { "powerpc-eabi" }
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            description "
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                This option specifies the command prefix used when
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                invoking the build tools."
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        }
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        cdl_option CYGBLD_GLOBAL_CFLAGS {
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            display "Global compiler flags"
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            flavor  data
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            no_define
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            default_value { "-msoft-float -mcpu=860 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }
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            description   "
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                This option controls the global compiler flags which
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                are used to compile all packages by
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                default. Individual packages may define
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                options which override these global flags."
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        }
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        cdl_option CYGBLD_GLOBAL_LDFLAGS {
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            display "Global linker flags"
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            flavor  data
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            no_define
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            default_value { "-msoft-float -mcpu=860 -g -nostdlib -Wl,--gc-sections -Wl,-static" }
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            description   "
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                This option controls the global linker flags. Individual
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                packages may define options which override these global flags."
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        }
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        cdl_option CYGBLD_BUILD_GDB_STUBS {
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            display "Build GDB stub ROM image"
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            default_value 0
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            requires { CYG_HAL_STARTUP == "ROM" }
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            requires CYGSEM_HAL_ROM_MONITOR
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            requires CYGBLD_BUILD_COMMON_GDB_STUBS
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            requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
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            requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
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            requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
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            requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
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            requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM
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            no_define
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            description "
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                This option enables the building of the GDB stubs for the
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                board. The common HAL controls takes care of most of the
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                build process, but the platform CDL takes care of creating
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                an S-Record data file suitable for programming using
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                the board's EPPC-Bug firmware monitor."
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            make -priority 320 {
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                /bin/gdb_module.bin : /bin/gdb_module.img
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                $(OBJCOPY) -O srec --change-address=0x02000000 $< $(@:.bin=.srec)
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                $(OBJCOPY) -O binary $< $@
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            }
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        }
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    }
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    cdl_component CYGPKG_HAL_POWERPC_VIPER_OPTIONS {
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        display "VIPER build options"
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        flavor  none
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        description   "
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            Package specific build options including control over
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            compiler flags used only in building this package,
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            and details of which tests are built."
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        cdl_option CYGPKG_HAL_POWERPC_VIPER_CFLAGS_ADD {
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            display "Additional compiler flags"
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            flavor  data
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            no_define
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            default_value { "" }
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            description   "
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                This option modifies the set of compiler flags for
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                building the VIPER HAL. These flags are used in addition
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                to the set of global flags."
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        }
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        cdl_option CYGPKG_HAL_POWERPC_VIPER_CFLAGS_REMOVE {
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            display "Suppressed compiler flags"
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            flavor  data
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            no_define
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            default_value { "" }
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            description   "
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                This option modifies the set of compiler flags for
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                building the VIPER HAL. These flags are removed from
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                the set of global flags if present."
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        }
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        cdl_option CYGPKG_HAL_POWERPC_VIPER_TESTS {
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            display "VIPER tests"
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            flavor  data
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            no_define
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            calculated { "tests/vipertime" }
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            description   "
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                This option specifies the set of tests for the VIPER HAL."
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        }
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    }
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    cdl_component CYGHWR_MEMORY_LAYOUT {
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        display "Memory layout"
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        flavor data
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        no_define
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        calculated { CYG_HAL_STARTUP == "RAM" ? "powerpc_viper_ram" : \
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                     CYG_HAL_STARTUP == "ROMRAM" ? "powerpc_viper_romram" : \
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                                                "powerpc_viper_rom" }
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        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
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            display "Memory layout linker script fragment"
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            flavor data
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            no_define
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            define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
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            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \
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                         CYG_HAL_STARTUP == "ROMRAM" ? "" : \
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                                                    "" }
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        }
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        cdl_option CYGHWR_MEMORY_LAYOUT_H {
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            display "Memory layout header file"
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            flavor data
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            no_define
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            define -file system.h CYGHWR_MEMORY_LAYOUT_H
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            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \
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                         CYG_HAL_STARTUP == "ROMRAM" ? "" : \
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                                                    "" }
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        }
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    }
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    cdl_option CYGSEM_HAL_ROM_MONITOR {
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        display       "Behave as a ROM monitor"
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        flavor        bool
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        default_value 0
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        parent        CYGPKG_HAL_ROM_MONITOR
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        requires      { CYG_HAL_STARTUP == "ROM" || CYG_HAL_STARTUP == "ROMRAM" }
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        description   "
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            Enable this option if this program is to be used as a ROM monitor,
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            i.e. applications will be loaded into RAM on the board, and this
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            ROM monitor may process exceptions or interrupts generated from the
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            application. This enables features such as utilizing a separate
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            interrupt stack when exceptions are generated."
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    }
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    cdl_component CYGPKG_REDBOOT_HAL_OPTIONS {
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        display       "Redboot HAL options"
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        flavor        none
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        no_define
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        parent        CYGPKG_REDBOOT
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        active_if     CYGPKG_REDBOOT
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        description   "
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            This option lists the target's requirements for a valid Redboot
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            configuration."
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        cdl_option CYGSEM_REDBOOT_HAL_LINUX_BOOT {
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            active_if      CYGBLD_BUILD_REDBOOT_WITH_EXEC
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            display        "Support booting Linux via RedBoot"
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            flavor         bool
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            default_value  1
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            description    "
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               This option enables RedBoot to support booting of a Linux kernel."
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            compile -library=libextras.a redboot_linux_exec.c
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        }
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        cdl_option CYGBLD_BUILD_REDBOOT_BIN {
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            display       "Build Redboot ROM binary image"
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            active_if     CYGBLD_BUILD_REDBOOT
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            default_value 1
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            no_define
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            description "This option enables the conversion of the Redboot ELF
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                         image to a binary image suitable for ROM programming."
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#            compile -library=libextras.a redboot_cmds.c
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            make -priority 325 {
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                /bin/redboot.bin : /bin/redboot.elf
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                $(OBJCOPY) --strip-debug $< $(@:.bin=.img)
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                $(OBJCOPY) -O srec $< $(@:.bin=.srec)
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                $(OBJCOPY) -O binary $< $@
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            }
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        }
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    }
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}

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