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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [sh/] [arch/] [v2_0/] [include/] [hal_arch.h] - Blame information for rev 174

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#ifndef CYGONCE_HAL_ARCH_H
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#define CYGONCE_HAL_ARCH_H
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//=============================================================================
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//
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//      hal_arch.h
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//
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//      Architecture specific abstractions
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//
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//=============================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):   jskov
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// Contributors:jskov
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// Date:        1999-04-24
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// Purpose:     Define architecture abstractions
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// Usage:       #include <cyg/hal/hal_arch.h>
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//              
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#include <pkgconf/hal.h>
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#include <cyg/infra/cyg_type.h>
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#include CYGBLD_HAL_VAR_EXCEPTION_MODEL_H
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//-----------------------------------------------------------------------------
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// Exception handling function.
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// This function is defined by the kernel according to this prototype. It is
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// invoked from the HAL to deal with any CPU exceptions that the HAL does
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// not want to deal with itself. It usually invokes the kernel's exception
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// delivery mechanism.
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externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data );
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//--------------------------------------------------------------------------
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// Bit manipulation routines
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externC cyg_uint32 hal_lsbit_index(cyg_uint32 mask);
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externC cyg_uint32 hal_msbit_index(cyg_uint32 mask);
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#define HAL_LSBIT_INDEX(index, mask) index = hal_lsbit_index(mask);
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#define HAL_MSBIT_INDEX(index, mask) index = hal_msbit_index(mask);
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//-----------------------------------------------------------------------------
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// Context switch macros.
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// The arguments are pointers to locations where the stack pointer
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// of the current thread is to be stored, and from where the sp of the
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// next thread is to be fetched.
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externC void hal_thread_switch_context( CYG_ADDRESS to, CYG_ADDRESS from );
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externC void hal_thread_load_context( CYG_ADDRESS to )
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    __attribute__ ((noreturn));
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#define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_)                    \
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        hal_thread_switch_context((CYG_ADDRESS)_tspptr_,(CYG_ADDRESS)_fspptr_);
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#define HAL_THREAD_LOAD_CONTEXT(_tspptr_)                               \
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        hal_thread_load_context( (CYG_ADDRESS)_tspptr_ );
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//-----------------------------------------------------------------------------
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// Execution reorder barrier.
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// When optimizing the compiler can reorder code. In multithreaded systems
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// where the order of actions is vital, this can sometimes cause problems.
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// This macro may be inserted into places where reordering should not happen.
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#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" )
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//-----------------------------------------------------------------------------
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// Breakpoint support
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// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to happen
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// if executed.
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// HAL_BREAKINST is the value of the breakpoint instruction and 
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// HAL_BREAKINST_SIZE is its size in bytes.
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// Enable interrupts before doing the trap, or the CPU will reset.
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#define HAL_BREAKPOINT(_label_)                         \
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    CYG_MACRO_START                                     \
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    HAL_ENABLE_INTERRUPTS();                            \
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    asm volatile (" .globl " #_label_ ";" #_label_ ": " \
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                  " trapa #0x20;nop;nop;nop");          \
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    CYG_MACRO_END
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#define HAL_BREAKINST           0xc320
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#define HAL_BREAKINST_SIZE      2
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//-----------------------------------------------------------------------------
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// HAL setjmp
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typedef struct {
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    cyg_uint32 sp;
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    cyg_uint32 pr;
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    cyg_uint32 r8;
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    cyg_uint32 r9;
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    cyg_uint32 r10;
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    cyg_uint32 r11;
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    cyg_uint32 r12;
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    cyg_uint32 r13;
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    cyg_uint32 r14;
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} hal_jmp_buf_t;
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#define CYGARC_JMP_BUF_SIZE      (sizeof(hal_jmp_buf_t) / sizeof(cyg_uint32))
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typedef cyg_uint32 hal_jmp_buf[ CYGARC_JMP_BUF_SIZE ];
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externC int hal_setjmp(hal_jmp_buf env);
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externC void hal_longjmp(hal_jmp_buf env, int val);
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//-----------------------------------------------------------------------------
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// Idle thread code.
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// This macro is called in the idle thread loop, and gives the HAL the
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// chance to insert code. Typical idle thread behaviour might be to halt the
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// processor.
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externC void hal_idle_thread_action(cyg_uint32 loop_count);
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#define HAL_IDLE_THREAD_ACTION(_count_) hal_idle_thread_action(_count_)
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//-----------------------------------------------------------------------------
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// Minimal and sensible stack sizes: the intention is that applications
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// will use these to provide a stack size in the first instance prior to
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// proper analysis.  Idle thread stack should be this big.
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//    THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES.
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//           THEY ARE HOWEVER ENOUGH TO START PROGRAMMING.
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// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES!
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// This is not a config option because it should not be adjusted except
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// under "enough rope" sort of disclaimers.
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// Stack frame overhead per call. Space to save FP, PR and 8 registers.
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#define CYGNUM_HAL_STACK_FRAME_SIZE (4 * 10)
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// Stack needed for a context switch (shreg_context_size from sh.inc)
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#define CYGNUM_HAL_STACK_CONTEXT_SIZE (4 * 21)
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// Interrupt + call to ISR, interrupt_end() and the DSR
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#define CYGNUM_HAL_STACK_INTERRUPT_SIZE \
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    ((24*4 /* sizeof(HAL_SavedRegisters) */) + 2 * CYGNUM_HAL_STACK_FRAME_SIZE)
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// We define a minimum stack size as the minimum any thread could ever
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// legitimately get away with. We can throw asserts if users ask for less
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// than this. Allow enough for three interrupt sources - clock, serial and
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// one other
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#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK 
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// An interrupt stack which is large enough for all possible interrupt
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// conditions (and only used for that purpose) exists.  "User" stacks
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// can therefore be much smaller
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# define CYGNUM_HAL_STACK_SIZE_MINIMUM \
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         (16*CYGNUM_HAL_STACK_FRAME_SIZE + 2*CYGNUM_HAL_STACK_INTERRUPT_SIZE)
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#else
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// No separate interrupt stack exists.  Make sure all threads contain
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// a stack sufficiently large
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# define CYGNUM_HAL_STACK_SIZE_MINIMUM                  \
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        (((2+3)*CYGNUM_HAL_STACK_INTERRUPT_SIZE) +      \
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         (16*CYGNUM_HAL_STACK_FRAME_SIZE))
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#endif
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// Now make a reasonable choice for a typical thread size. Pluck figures
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// from thin air and say 30 call frames with an average of 16 words of
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// automatic variables per call frame
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#define CYGNUM_HAL_STACK_SIZE_TYPICAL                \
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        (CYGNUM_HAL_STACK_SIZE_MINIMUM +             \
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         30 * (CYGNUM_HAL_STACK_FRAME_SIZE+(16*4)))
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//--------------------------------------------------------------------------
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// Macros for switching context between two eCos instances (jump from
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// code in ROM to code in RAM or vice versa).
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#define CYGARC_HAL_SAVE_GP()
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#define CYGARC_HAL_RESTORE_GP()
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//-----------------------------------------------------------------------------
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#endif // CYGONCE_HAL_ARCH_H
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// End of hal_arch.h

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