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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [sh/] [arch/] [v2_0/] [include/] [hal_var_sp.h] - Blame information for rev 773

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#ifndef CYGONCE_HAL_VAR_BANK_H
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#define CYGONCE_HAL_VAR_BANK_H
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//=============================================================================
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//
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//      hal_var_bank.h
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//
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//      Architecture abstractions for variants without banked registers
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//
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//=============================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):   jskov
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// Contributors:jskov
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// Date:        2002-01-11
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// Purpose:     Architecture abstractions for variants without banked registers
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//              
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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//-----------------------------------------------------------------------------
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// Processor saved states:
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typedef struct
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{
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    // These are common to all saved states
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    cyg_uint32   r[16];                 // Data regs
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    cyg_uint32   macl;                  // Multiply and accumulate - low
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    cyg_uint32   mach;                  // Multiply and accumulate - high
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    cyg_uint32   pr;                    // Procedure Reg
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#if 0 // FIXME: how are these accessed?
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    cyg_uint32   mod;                   // Modulo register
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    cyg_uint32   rs;                    // Repeat start
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    cyg_uint32   re;                    // Repeat end
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#endif
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    cyg_uint32   sr;                    // Status Reg
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    cyg_uint32   pc;                    // Program Counter
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    // This marks the limit of state saved during a context switch and
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    // is used to calculate necessary stack allocation for context switches.
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    // It would probably be better to have a union instead...
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    cyg_uint32   context_size[0];
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    // These are only saved on interrupts
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    cyg_uint32   vbr;                   // Vector Base Register
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    cyg_uint32   gbr;                   // Global Base Register
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    // These are only saved on interrupts
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    cyg_uint32   event;                // vector number
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} HAL_SavedRegisters;
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//-----------------------------------------------------------------------------
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// Context Initialization
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// Initialize the context of a thread.
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// Arguments:
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// _sparg_ name of variable containing current sp, will be written with new sp
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// _thread_ thread object address, passed as argument to entry point
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// _entry_ entry point address.
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// _id_ bit pattern used in initializing registers, for debugging.
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#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ )           \
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    CYG_MACRO_START                                                           \
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    register HAL_SavedRegisters *_regs_;                                      \
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    int _i_;                                                                  \
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    _regs_ = (HAL_SavedRegisters *)((_sparg_) - sizeof(HAL_SavedRegisters));  \
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    for( _i_ = 0; _i_ < 16; _i_++ ) (_regs_)->r[_i_] = (_id_)|_i_;            \
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    (_regs_)->r[15] = (CYG_WORD)(_regs_);      /* SP = top of stack      */   \
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    (_regs_)->r[04] = (CYG_WORD)(_thread_);    /* R4 = arg1 = thread ptr */   \
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    (_regs_)->mach = 0;                        /* MACH = 0               */   \
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    (_regs_)->macl = 0;                        /* MACL = 0               */   \
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    (_regs_)->pr = (CYG_WORD)(_entry_);        /* PR = entry point       */   \
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    (_regs_)->sr = 0;                          /* SR = enable interrupts */   \
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    (_regs_)->pc = (CYG_WORD)(_entry_);        /* set PC for thread dbg  */   \
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    _sparg_ = (CYG_ADDRESS)_regs_;                                            \
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    CYG_MACRO_END
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//-----------------------------------------------------------------------------
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// Thread register state manipulation for GDB support.
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// Translate a stack pointer as saved by the thread context macros above into
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// a pointer to a HAL_SavedRegisters structure.
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#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ )  \
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        (_regs_) = (HAL_SavedRegisters *)(_sp_)
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// Copy a set of registers from a HAL_SavedRegisters structure into a
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// GDB ordered array.    
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#define HAL_GET_GDB_REGISTERS( _aregval_, _regs_ )              \
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    CYG_MACRO_START                                             \
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    CYG_ADDRWORD *_regval_ = (CYG_ADDRWORD *)(_aregval_);       \
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    int _i_;                                                    \
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                                                                \
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    for( _i_ = 0; _i_ < 16; _i_++ )                             \
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        _regval_[_i_] = (_regs_)->r[_i_];                       \
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                                                                \
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    _regval_[16] = (_regs_)->pc;                                \
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    _regval_[17] = (_regs_)->pr;                                \
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    _regval_[18] = (_regs_)->gbr;                               \
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    _regval_[19] = (_regs_)->vbr;                               \
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    _regval_[20] = (_regs_)->mach;                              \
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    _regval_[21] = (_regs_)->macl;                              \
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    _regval_[22] = (_regs_)->sr;                                \
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                                                                \
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    /* 23-51 not used atm. */                                   \
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    CYG_MACRO_END
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// Copy a GDB ordered array into a HAL_SavedRegisters structure.
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#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ )             \
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    CYG_MACRO_START                                             \
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    CYG_ADDRWORD *_regval_ = (CYG_ADDRWORD *)(_aregval_);       \
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    int _i_;                                                    \
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                                                                \
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    for( _i_ = 0; _i_ < 16; _i_++ )                             \
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        (_regs_)->r[_i_] = _regval_[_i_];                       \
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                                                                \
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    (_regs_)->pc = _regval_[16];                                \
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    (_regs_)->pr = _regval_[17];                                \
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    (_regs_)->gbr  = _regval_[18];                              \
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    (_regs_)->vbr  = _regval_[19];                              \
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    (_regs_)->mach = _regval_[20];                              \
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    (_regs_)->macl = _regval_[21];                              \
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    (_regs_)->sr = _regval_[22];                                \
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    CYG_MACRO_END
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//--------------------------------------------------------------------------
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// CPU address space translation macros
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#define CYGARC_BUS_ADDRESS(x)       ((CYG_ADDRWORD)(x) & 0x1fffffff)
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#define CYGARC_CACHED_ADDRESS(x)    (CYGARC_BUS_ADDRESS(x)|0x00000000)
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#define CYGARC_UNCACHED_ADDRESS(x)  (CYGARC_BUS_ADDRESS(x)|0x20000000)
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//-----------------------------------------------------------------------------
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#endif // CYGONCE_HAL_VAR_BANK_H
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// End of hal_var_bank.h

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