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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [sh/] [arch/] [v2_0/] [tests/] [intr0.c] - Blame information for rev 27

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//==========================================================================
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//
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//        intr0.c
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//
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//        Interrupt controls test
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):     jskov
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// Contributors:  jskov
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// Date:          2001-01-18
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//####DESCRIPTIONEND####
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//==========================================================================
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#include <pkgconf/system.h>
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#include <cyg/infra/testcase.h>
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#if defined(CYGPKG_KERNEL)
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#include <pkgconf/kernel.h>
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#if defined(CYGFUN_KERNEL_API_C)
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#include <cyg/hal/hal_arch.h>           // CYGNUM_HAL_STACK_SIZE_TYPICAL
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#include <cyg/kernel/kapi.h>
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#include <cyg/hal/hal_intr.h>
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// -------------------------------------------------------------------------
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#define NTHREADS 1
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#define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL
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static cyg_handle_t thread[NTHREADS];
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static cyg_thread thread_obj[NTHREADS];
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static char stack[NTHREADS][STACKSIZE];
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// -------------------------------------------------------------------------
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// This is (tick time * 1.5) 
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#define TICK_DELAY (1500000 / CYGNUM_HAL_RTC_DENOMINATOR)
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static void
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entry0( cyg_addrword_t data )
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{
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    int tick;
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    // Scheduler and thus timer interrupts are running by the
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    // time we get here.
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    // Wait for next tick
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    tick = cyg_current_time();
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    do {} while (cyg_current_time() == tick);
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    tick = cyg_current_time();
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    // Then mask timer interrupts
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    HAL_INTERRUPT_MASK(CYGNUM_HAL_INTERRUPT_RTC);
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    // and wait for the time when the next tick should have come
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    // and check it didn't trigger an interrupt
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    hal_delay_us(TICK_DELAY);
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    CYG_TEST_CHECK(cyg_current_time() == tick, "Timer interrupt while masked");
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    // Now change interrupt level, and make the check again. Changing
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    // level should not affect interrupt mask state.
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    HAL_INTERRUPT_SET_LEVEL(CYGNUM_HAL_INTERRUPT_RTC, 8);
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    hal_delay_us(TICK_DELAY);
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    CYG_TEST_CHECK(cyg_current_time() == tick,
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                   "Timer interrupt after changing level");
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    // Finally unmask the interrupt and make sure it results in ticks.
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    HAL_INTERRUPT_UNMASK(CYGNUM_HAL_INTERRUPT_RTC);
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    hal_delay_us(TICK_DELAY);
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    CYG_TEST_CHECK(cyg_current_time() != tick,
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                   "No timer interrupt after unmask");
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    CYG_TEST_PASS_FINISH("SH intr0 test end");
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}
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// -------------------------------------------------------------------------
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externC void
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cyg_start( void )
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{
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    CYG_TEST_INIT();
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    cyg_thread_create(4, entry0 , (cyg_addrword_t)0, "intr",
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        (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]);
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    cyg_thread_resume(thread[0]);
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    cyg_scheduler_start();
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}
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// -------------------------------------------------------------------------
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#else // def CYGFUN_KERNEL_API_C
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#define N_A_MSG "Kernel C API layer disabled"
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#endif // def CYGFUN_KERNEL_API_C
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#else // def CYGPKG_KERNEL
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#define N_A_MSG "Needs kernel"
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#endif // def CYGPKG_KERNEL
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#ifdef N_A_MSG
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externC void
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cyg_start( void )
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{
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    CYG_TEST_INIT();
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    CYG_TEST_NA( N_A_MSG );
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}
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#endif // N_A_MSG
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// -------------------------------------------------------------------------
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// EOF intr0.c

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