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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [sh/] [se7751/] [v2_0/] [cdl/] [hal_sh_sh7751_se7751.cdl] - Blame information for rev 584

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# ====================================================================
2
#
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#      hal_sh_sh7751_se7751.cdl
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#
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#      Hitachi SE7751 board HAL package configuration data
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#
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# ====================================================================
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#####ECOSGPLCOPYRIGHTBEGIN####
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## -------------------------------------------
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## This file is part of eCos, the Embedded Configurable Operating System.
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## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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##
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## eCos is free software; you can redistribute it and/or modify it under
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## the terms of the GNU General Public License as published by the Free
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## Software Foundation; either version 2 or (at your option) any later version.
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##
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## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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## WARRANTY; without even the implied warranty of MERCHANTABILITY or
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## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License along
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## with eCos; if not, write to the Free Software Foundation, Inc.,
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## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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##
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## As a special exception, if other files instantiate templates or use macros
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## or inline functions from this file, or you compile this file and link it
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## with other works to produce a work based on this file, this file does not
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## by itself cause the resulting work to be covered by the GNU General Public
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## License. However the source code for this file must still be made available
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## in accordance with section (3) of the GNU General Public License.
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##
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## This exception does not invalidate any other reasons why a work based on
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## this file might be covered by the GNU General Public License.
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##
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## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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## at http://sources.redhat.com/ecos/ecos-license/
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## -------------------------------------------
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#####ECOSGPLCOPYRIGHTEND####
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# ====================================================================
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######DESCRIPTIONBEGIN####
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#
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# Author(s):      jskov
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# Original data:  jskov
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# Contributors:
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# Date:           2001-07-09
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#
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#####DESCRIPTIONEND####
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#
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# ====================================================================
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52
cdl_package CYGPKG_HAL_SH_SH7751_SE7751 {
53
    display       "Hitachi/SH7751 SE7751 board"
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    parent        CYGPKG_HAL_SH
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    requires      CYGPKG_HAL_SH_7751
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    requires      ! CYGHWR_HAL_SH_BIGENDIAN
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    requires      CYGHWR_HAL_SH_IRQ_USE_IRQLVL
58
    define_header hal_sh_sh7751_se7751.h
59
    include_dir   cyg/hal
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    description   "
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        The SE7751 HAL package provides the support needed to run
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        eCos on a Hitachi/SH SE7751 board."
63
 
64
    compile       hal_diag.c plf_misc.c ser16c550c.c m1543c.c
65
 
66
    implements    CYGINT_HAL_DEBUG_GDB_STUBS
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    implements    CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
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    implements    CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
69
    implements    CYGINT_HAL_VIRTUAL_VECTOR_COMM_BAUD_SUPPORT
70
 
71
    define_proc {
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        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   "
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        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H "
74
 
75
        puts $::cdl_header "#define CYGNUM_HAL_SH_SH4_SCIF_PORTS 1"
76
        puts $::cdl_header "#define CYGHWR_HAL_VSR_TABLE 0x8c000000"
77
        puts $::cdl_header "#define CYGHWR_HAL_VECTOR_TABLE 0x8c000100"
78
 
79
        puts $::cdl_header "#define HAL_PLATFORM_CPU    \"SH 7751\""
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        puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"SE7751\""
81
        puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"\""
82
    }
83
 
84
    cdl_component CYG_HAL_STARTUP {
85
        display       "Startup type"
86
        flavor        data
87
        legal_values  {"RAM" "ROM" "ROMRAM" }
88
        default_value {"RAM"}
89
        no_define
90
        define -file system.h CYG_HAL_STARTUP
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        description   "
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           When targetting the SE7751 board it is possible to build
93
           the system for either RAM bootstrap or ROM bootstrap.
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           RAM bootstrap generally requires that the board
95
           is equipped with ROMs containing a suitable ROM monitor or
96
           equivalent software that allows GDB to download the eCos
97
           application on to the board. The ROM bootstrap typically
98
           requires that the eCos application be blown into EPROMs or
99
           equivalent technology. ROMRAM bootstrap is similar to ROM
100
           bootstrap, but everything is copied to RAM before execution
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           starts thus improving performance, but at the cost of an
102
           increased RAM footprint."
103
    }
104
 
105
    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
106
        display      "Number of communication channels on the board"
107
        flavor       data
108
        calculated   2
109
    }
110
 
111
    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {
112
        display          "Debug serial port"
113
        flavor data
114
        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
115
        default_value    0
116
        description      "
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           The SE7751 board has one serial port. This option
118
           chooses which port will be used to connect to a host
119
           running GDB."
120
    }
121
 
122
    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT {
123
        display      "Default console channel."
124
        flavor       data
125
        calculated   0
126
    }
127
 
128
    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {
129
        display          "Diagnostic serial port"
130
        flavor data
131
        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
132
        default_value    CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT
133
        description      "
134
           The SE7751 board has two serial ports.  This option
135
           chooses which port will be used for diagnostic output."
136
    }
137
 
138
    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CHANNELS_DEFAULT_BAUD {
139
        display       "Console/GDB serial port baud rate"
140
        flavor        data
141
        legal_values  9600 19200 38400 57600 115200
142
        default_value 38400
143
        define        CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD
144
        description   "
145
            This option controls the default baud rate used for the
146
            Console/GDB connection."
147
    }
148
 
149
    cdl_component CYGHWR_HAL_SH_PLF_CLOCK_SETTINGS {
150
        display          "SH on-chip platform clock controls"
151
        description      "
152
            The various clocks used by the system are derived from
153
            these options."
154
        flavor        none
155
        no_define
156
 
157
        cdl_option CYGHWR_HAL_SH_OOC_XTAL {
158
            display          "SH clock crystal"
159
            flavor           data
160
            legal_values     8000000 to 50000000
161
            default_value    27000000
162
            no_define
163
            description      "
164
                This option specifies the frequency of the crystal all
165
                other clocks are derived from."
166
        }
167
 
168
        cdl_option CYGHWR_HAL_SH_OOC_CKIO {
169
            display          "SH clock CKIO output enable"
170
            default_value    1
171
            description      "
172
                This selects whether CKIO output is enabled."
173
        }
174
 
175
        cdl_option CYGHWR_HAL_SH_OOC_PLL_1 {
176
            display          "SH clock PLL circuit 1"
177
            flavor           data
178
            default_value    6
179
            legal_values     { 0 6 }
180
            description      "
181
                This selects the multiplication factor provided by
182
                PLL1."
183
        }
184
 
185
        cdl_option CYGHWR_HAL_SH_OOC_PLL_2 {
186
            display          "SH clock PLL circuit 2"
187
            flavor           data
188
            default_value    1
189
            legal_values     { 0 1 }
190
            description      "
191
                This selects the multiplication factor provided by
192
                PLL2. If PLL2 is disabled this option should
193
                be set to zero."
194
        }
195
 
196
        cdl_option CYGHWR_HAL_SH_OOC_DIVIDER_1 {
197
            display          "SH clock divider 1"
198
            flavor           data
199
            default_value    1
200
            legal_values     { 1 2 }
201
            description      "
202
                This divider option affects all clocks."
203
        }
204
 
205
        cdl_option CYGHWR_HAL_SH_OOC_DIVIDER_IFC {
206
            display          "SH CPU clock divider"
207
            flavor           data
208
            default_value    1
209
            legal_values     { 1 2 3 4 6 8 }
210
            description      "
211
                This divider option affects the CPU clock."
212
        }
213
 
214
        cdl_option CYGHWR_HAL_SH_OOC_DIVIDER_BFC {
215
            display          "SH bus clock divider"
216
            flavor           data
217
            default_value    3
218
            legal_values     { 1 2 3 4 6 8 }
219
            description      "
220
                This divider option affects the bus clock."
221
        }
222
 
223
        cdl_option CYGHWR_HAL_SH_OOC_DIVIDER_PFC {
224
            display          "SH peripheral clock divider"
225
            flavor           data
226
            default_value    6
227
            legal_values     { 1 2 3 4 6 8 }
228
            description      "
229
                This divider option affects the peripheral clock."
230
        }
231
 
232
        cdl_option CYGHWR_HAL_SH_OOC_CLOCK_MODE {
233
            display          "SH clock mode"
234
            flavor           data
235
            default_value    3
236
            legal_values     { 0 1 2 3 4 5 }
237
            description      "
238
                This option must mirror the clock mode hardwired on
239
                the MD0-MD2 pins of the CPU in order to correctly
240
                initialize the FRQCR register."
241
        }
242
    }
243
 
244
    cdl_component CYGBLD_GLOBAL_OPTIONS {
245
        display "Global build options"
246
        flavor  none
247
        parent  CYGPKG_NONE
248
        no_define
249
        description   "
250
            Global build options including control over
251
            compiler flags, linker flags and choice of toolchain."
252
 
253
 
254
        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
255
            display "Global command prefix"
256
            flavor  data
257
            no_define
258
            default_value { "sh-elf" }
259
            description "
260
                This option specifies the command prefix used when
261
                invoking the build tools."
262
        }
263
 
264
        cdl_option CYGBLD_GLOBAL_CFLAGS {
265
            display "Global compiler flags"
266
            flavor  data
267
            no_define
268
            default_value { CYGHWR_HAL_SH_BIGENDIAN ? "-mb -m3 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -ggdb -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" : "-ml -m3 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -ggdb -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }
269
            description   "
270
                This option controls the global compiler flags which
271
                are used to compile all packages by
272
                default. Individual packages may define
273
                options which override these global flags."
274
        }
275
 
276
        cdl_option CYGBLD_GLOBAL_LDFLAGS {
277
            display "Global linker flags"
278
            flavor  data
279
            no_define
280
            default_value { CYGHWR_HAL_SH_BIGENDIAN ? "-mb -m3 -ggdb -nostdlib -Wl,--gc-sections -Wl,-static" : "-ml -m3 -ggdb -nostdlib -Wl,--gc-sections -Wl,-static" }
281
            description   "
282
                This option controls the global linker flags. Individual
283
                packages may define options which override these global flags."
284
        }
285
 
286
        cdl_option CYGBLD_BUILD_GDB_STUBS {
287
            display "Build GDB stub ROM image"
288
            default_value 0
289
            requires { CYG_HAL_STARTUP == "ROM" }
290
            requires CYGSEM_HAL_ROM_MONITOR
291
            requires CYGBLD_BUILD_COMMON_GDB_STUBS
292
            requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
293
            requires ! CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
294
            requires ! CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
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            requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
296
            requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM
297
            no_define
298
            description "
299
                This option enables the building of the GDB stubs for the
300
                board. The common HAL controls takes care of most of the
301
                build process, but the final conversion from ELF image to
302
                binary data is handled by the platform CDL, allowing
303
                relocation of the data if necessary."
304
 
305
            make -priority 320 {
306
                /bin/gdb_module.bin : /bin/gdb_module.img
307
                $(OBJCOPY) -O binary $< $@
308
            }
309
        }
310
    }
311
 
312
    cdl_component CYGHWR_MEMORY_LAYOUT {
313
        display "Memory layout"
314
        flavor data
315
        no_define
316
        calculated { CYG_HAL_STARTUP == "RAM" ? "sh_sh7751_se7751_ram" : \
317
                     CYG_HAL_STARTUP == "ROM" ? "sh_sh7751_se7751_rom" : \
318
                                                "sh_sh7751_se7751_romram" }
319
 
320
        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
321
            display "Memory layout linker script fragment"
322
            flavor data
323
            no_define
324
            define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
325
            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \
326
                         CYG_HAL_STARTUP == "ROM" ? "" : \
327
                                                    "" }
328
        }
329
 
330
        cdl_option CYGHWR_MEMORY_LAYOUT_H {
331
            display "Memory layout header file"
332
            flavor data
333
            no_define
334
            define -file system.h CYGHWR_MEMORY_LAYOUT_H
335
            calculated { CYG_HAL_STARTUP == "RAM" ? "" : \
336
                         CYG_HAL_STARTUP == "ROM" ? "" : \
337
                                                    "" }
338
        }
339
    }
340
 
341
    cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
342
        display       "Work with a ROM monitor"
343
        flavor        booldata
344
        legal_values  { "GDB_stubs" }
345
        default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 }
346
        requires      { CYG_HAL_STARTUP == "RAM" }
347
        parent        CYGPKG_HAL_ROM_MONITOR
348
        description   "
349
            Support can be enabled for boot ROMs or ROM monitors which contain
350
            GDB stubs. This support changes various eCos semantics such as
351
            the encoding of diagnostic output, and the overriding of hardware
352
            interrupt vectors."
353
    }
354
 
355
    cdl_option CYGSEM_HAL_ROM_MONITOR {
356
        display       "Behave as a ROM monitor"
357
        flavor        bool
358
        default_value 0
359
        parent        CYGPKG_HAL_ROM_MONITOR
360
        requires      { CYG_HAL_STARTUP == "ROM" }
361
        description   "
362
            Enable this option if this program is to be used as a ROM monitor,
363
            i.e. applications will be loaded into RAM on the board, and this
364
            ROM monitor may process exceptions or interrupts generated from the
365
            application. This enables features such as utilizing a separate
366
            interrupt stack when exceptions are generated."
367
    }
368
 
369
    cdl_component CYGPKG_REDBOOT_HAL_OPTIONS {
370
        display       "Redboot HAL options"
371
        flavor        none
372
        no_define
373
        parent        CYGPKG_REDBOOT
374
        active_if     CYGPKG_REDBOOT
375
        description   "
376
            This option lists the target's requirements for a valid Redboot
377
            configuration."
378
 
379
        cdl_option CYGBLD_BUILD_REDBOOT_BIN {
380
            display       "Build Redboot ROM binary image"
381
            active_if     CYGBLD_BUILD_REDBOOT
382
            default_value 1
383
            no_define
384
            description "This option enables the conversion of the Redboot ELF
385
                         image to a binary image suitable for ROM programming."
386
 
387
            make -priority 325 {
388
                /bin/redboot.bin : /bin/redboot.elf
389
                $(OBJCOPY) --strip-debug $< $(@:.bin=.img)
390
                $(OBJCOPY) -O srec $< $(@:.bin=.srec)
391
                $(OBJCOPY) --change-address 0x21000000 -O srec $< $(@:.bin=.eprom.srec)
392
                $(OBJCOPY) -O binary $< $@
393
            }
394
        }
395
    }
396
}

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