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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [sh/] [se77x9/] [v2_0/] [include/] [plf_intr.h] - Blame information for rev 631

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#ifndef CYGONCE_HAL_PLF_INTR_H
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#define CYGONCE_HAL_PLF_INTR_H
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//==========================================================================
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//
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//      plf_intr.h
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//
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//      Platform specific Interrupt and clock support
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    jskov
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// Contributors: jskov
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// Date:         2001-06-12
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// Purpose:      Define Interrupt support
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// Description:  The macros defined here provide the HAL APIs for handling
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//               interrupts and the clock for the SE77x9 board.
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// Usage:
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//               #include <cyg/hal/plf_intr.h>
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//               ...
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//              
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//
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <pkgconf/hal.h>
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#include <cyg/hal/hal_io.h>
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//----------------------------------------------------------------------------
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// External interrupts
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#define CYGNUM_HAL_INTERRUPT_EXTERNALS_BASE CYGNUM_HAL_INTERRUPT_LVL0
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#define CYGNUM_HAL_INTERRUPT_SLOT_IRQ8 CYGNUM_HAL_INTERRUPT_LVL0
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#define CYGNUM_HAL_INTERRUPT_KEYBOARD  CYGNUM_HAL_INTERRUPT_LVL1
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#define CYGNUM_HAL_INTERRUPT_PCMCIA2   CYGNUM_HAL_INTERRUPT_LVL2
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#define CYGNUM_HAL_INTERRUPT_COM2      CYGNUM_HAL_INTERRUPT_LVL3
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#define CYGNUM_HAL_INTERRUPT_SLOT_IRQ6 CYGNUM_HAL_INTERRUPT_LVL4
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#define CYGNUM_HAL_INTERRUPT_MOUSE     CYGNUM_HAL_INTERRUPT_LVL5
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#define CYGNUM_HAL_INTERRUPT_PCMCIA1   CYGNUM_HAL_INTERRUPT_LVL6
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#define CYGNUM_HAL_INTERRUPT_COM1      CYGNUM_HAL_INTERRUPT_LVL7
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#define CYGNUM_HAL_INTERRUPT_SLOT_IRQ4 CYGNUM_HAL_INTERRUPT_LVL8
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#define CYGNUM_HAL_INTERRUPT_SLOT_IRQ3 CYGNUM_HAL_INTERRUPT_LVL9
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#define CYGNUM_HAL_INTERRUPT_PARALLEL  CYGNUM_HAL_INTERRUPT_LVL10
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#define CYGNUM_HAL_INTERRUPT_SLOT_IRQ2 CYGNUM_HAL_INTERRUPT_LVL11
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#define CYGNUM_HAL_INTERRUPT_LAN       CYGNUM_HAL_INTERRUPT_LVL12
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#define CYGNUM_HAL_INTERRUPT_IDE       CYGNUM_HAL_INTERRUPT_LVL13
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#define CYGNUM_HAL_INTERRUPT_PCMCIA0   CYGNUM_HAL_INTERRUPT_LVL14
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//----------------------------------------------------------------------------
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// Interrupt controller
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#define CYGARC_REG_INTC_A                   0xb1400000
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#define CYGARC_REG_INTC_B                   0xb1400002
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#define CYGARC_REG_INTC_C                   0xb1400004
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#define CYGARC_REG_INTC_D                   0xb1400006
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#define CYGARC_REG_INTC_E                   0xb1400008
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#define CYGARC_REG_INTC_F                   0xb140000a
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#define CYGARC_REG_INTC_G                   0xb140000c
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//----------------------------------------------------------------------------
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// Interrupt configuration extention macros
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//
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// It appears that masks do not appear linear in the INTC like on the SE7751.
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// The below magic values determined from the INTC's startup values.
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//               A        B       C       D       E       F      G
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// 0xb1400000: 0x02a0  0x0005  0x008c  0xe030  0x0d91  0xf0b0  0x7640  0x0000
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static inline void
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_mask_vec(int level, cyg_uint32 reg, int shift, int lvl)
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{
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    cyg_uint16 msk;
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    shift *= 4;
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    HAL_READ_UINT16(reg, msk);
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    msk &= ~(0x000f << shift);
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    if (level) msk |= lvl << shift;
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    HAL_WRITE_UINT16(reg, msk);
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}
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#define CYGPRI_HAL_INTERRUPT_UPDATE_LEVEL_PLF(vec, level)                        \
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 case CYGNUM_HAL_INTERRUPT_SLOT_IRQ8:                                            \
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     _mask_vec(level, CYGARC_REG_INTC_F, 3, 0xf);                                \
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     break;                                                                      \
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 case CYGNUM_HAL_INTERRUPT_KEYBOARD:                                             \
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     _mask_vec(level, CYGARC_REG_INTC_D, 3, 0xe);                                \
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     break;                                                                      \
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 case CYGNUM_HAL_INTERRUPT_PCMCIA2:                                              \
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     _mask_vec(level, CYGARC_REG_INTC_E, 2, 0xd);                                \
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     break;                                                                      \
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 case CYGNUM_HAL_INTERRUPT_COM2:                                                 \
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     _mask_vec(level, CYGARC_REG_INTC_C, 0, 0xc);                                \
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     break;                                                                      \
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 case CYGNUM_HAL_INTERRUPT_SLOT_IRQ6:                                            \
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     _mask_vec(level, CYGARC_REG_INTC_F, 1, 0xb);                                \
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     break;                                                                      \
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 case CYGNUM_HAL_INTERRUPT_MOUSE:                                                \
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     _mask_vec(level, CYGARC_REG_INTC_A, 1, 0xa);                                \
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     break;                                                                      \
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 case CYGNUM_HAL_INTERRUPT_PCMCIA1:                                              \
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     _mask_vec(level, CYGARC_REG_INTC_E, 1, 0x9);                                \
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     break;                                                                      \
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 case CYGNUM_HAL_INTERRUPT_COM1:                                                 \
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     _mask_vec(level, CYGARC_REG_INTC_C, 1, 0x8);                                \
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     break;                                                                      \
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 case CYGNUM_HAL_INTERRUPT_SLOT_IRQ4:                                            \
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     _mask_vec(level, CYGARC_REG_INTC_G, 3, 0x7);                                \
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     break;                                                                      \
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 case CYGNUM_HAL_INTERRUPT_SLOT_IRQ3:                                            \
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     _mask_vec(level, CYGARC_REG_INTC_G, 2, 0x6);                                \
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     break;                                                                      \
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 case CYGNUM_HAL_INTERRUPT_PARALLEL:                                             \
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     _mask_vec(level, CYGARC_REG_INTC_B, 0, 0x5);                                \
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     break;                                                                      \
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 case CYGNUM_HAL_INTERRUPT_SLOT_IRQ2:                                            \
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     _mask_vec(level, CYGARC_REG_INTC_G, 1, 0x4);                                \
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     break;                                                                      \
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 case CYGNUM_HAL_INTERRUPT_LAN:                                                  \
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     _mask_vec(level, CYGARC_REG_INTC_D, 1, 0x3);                                \
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     break;                                                                      \
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 case CYGNUM_HAL_INTERRUPT_IDE:                                                  \
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     _mask_vec(level, CYGARC_REG_INTC_A, 2, 0x2);                                \
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     break;                                                                      \
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 case CYGNUM_HAL_INTERRUPT_PCMCIA0:                                              \
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     _mask_vec(level, CYGARC_REG_INTC_E, 0, 0x1);                                \
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     break;
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//----------------------------------------------------------------------------
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// Reset.
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// Block interrupts and cause an exception. This forces a reset.
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#define HAL_PLATFORM_RESET() \
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    asm volatile ("ldc %0,sr;trapa #0x00;" : : "r" (CYGARC_REG_SR_BL))
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#define HAL_PLATFORM_RESET_ENTRY 0x80000000
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//--------------------------------------------------------------------------
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#endif // ifndef CYGONCE_HAL_PLF_INTR_H
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// End of plf_intr.h

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