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//=============================================================================
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//
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// mod_regs_cac.h
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//
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// CAC (cache) Module register definitions
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//
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//=============================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): jskov
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// Contributors:jskov
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// Date: 2002-01-09
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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// Besides the below, cache sizes are defined in the CPU variant module
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// headers (mod_76xx.h).
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//--------------------------------------------------------------------------
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// Cache registers
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#define CYGARC_REG_CCR 0xfffffe92
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#define CYGARC_REG_CCR_W3 0xc0 // way affected
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#define CYGARC_REG_CCR_W2 0x80
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#define CYGARC_REG_CCR_W1 0x40
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#define CYGARC_REG_CCR_W0 0x00
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#define CYGARC_REG_CCR_WB 0x20 // write-back
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#define CYGARC_REG_CCR_CP 0x10 // cache purge
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#define CYGARC_REG_CCR_TW 0x08 // two-way mode
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#define CYGARC_REG_CCR_OD 0x04 // operand replacement disable
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#define CYGARC_REG_CCR_ID 0x02 // instruction replacement disable
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#define CYGARC_REG_CCR_CE 0x01 // cache enable
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//--------------------------------------------------------------------------
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// Address array access
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// Address part (base/top/step specified in mod file)
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#define CYGARC_REG_CACHE_ADDRESS_ADDRESS 0x00000008 // compare address
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// Data part
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#define CYGARC_REG_CACHE_ADDRESS_TAG_Mask 0x1ffffc00
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#define CYGARC_REG_CACHE_ADDRESS_U 0x00000002 // updated (contains dirty data)
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#define CYGARC_REG_CACHE_ADDRESS_V 0x00000001 // valid
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