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//=============================================================================

//

//      mod_regs_frt.h

//

//      FRT (Free-Running Timer) Module register definitions

//

//=============================================================================

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// -------------------------------------------

// This file is part of eCos, the Embedded Configurable Operating System.

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//=============================================================================

//#####DESCRIPTIONBEGIN####

//

// Author(s):   jskov

// Contributors:jskov

// Date:        2002-01-16

//              

//####DESCRIPTIONEND####

//

//=============================================================================

//--------------------------------------------------------------------------

// Free Running Timer

#define CYGARC_REG_TIER              0xfffffe10

#define CYGARC_REG_FTCSR             0xfffffe11

#define CYGARC_REG_FRC               0xfffffe12

#define CYGARC_REG_OCR               0xfffffe14

#define CYGARC_REG_TCR               0xfffffe16

#define CYGARC_REG_TOCR              0xfffffe17

#define CYGARC_REG_FICR              0xfffffe18

#define CYGARC_REG_TIER_ICIE         0x80 // input capture irq enable

#define CYGARC_REG_TIER_OCIAE        0x08 // output compare A irq enable

#define CYGARC_REG_TIER_OCIBE        0x04 // output compare B irq enable

#define CYGARC_REG_TIER_OVIE         0x02 // overflow irq enable

#define CYGARC_REG_FTCSR_ICF         0x80 // input capture flag

#define CYGARC_REG_FTCSR_OCFA        0x08 // output compare flag A

#define CYGARC_REG_FTCSR_OCFB        0x04 // output compare flag B

#define CYGARC_REG_FTCSR_OVF         0x02 // timer overflow flag

#define CYGARC_REG_FTCSR_CCLRA       0x01 // counter clear A

#define CYGARC_REG_TCR_IEDG          0x80 // capture on falling (0) or rising (1)

#define CYGARC_REG_TCR_CLK_8         0x00 // clk/8

#define CYGARC_REG_TCR_CLK_32        0x01 // clk/32

#define CYGARC_REG_TCR_CLK_128       0x02 // clk/128

#define CYGARC_REG_TCR_CLK_EXT       0x03 // external clock

#define CYGARC_REG_TOCR_OCRS         0x08 // Select OCRA (0) or OCRB (1) on _OCR

#define CYGARC_REG_TOCR_OLVLA        0x02 // enable output on match A

#define CYGARC_REG_TOCR_OLVLB        0x01 // enable output on match B