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//=============================================================================
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//
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// mod_regs_pfc.h
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//
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// PFC (pin function controller) Module register definitions
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//
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//=============================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): jskov
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// Contributors:jskov
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// Date: 2000-10-30
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//
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//####DESCRIPTIONEND####
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//
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//=============================================================================
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#define CYGARC_REG_PACR 0xa4000100 // port A control
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#define CYGARC_REG_PBCR 0xa4000102 // port B control
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#define CYGARC_REG_PCCR 0xa4000104 // port C control
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#define CYGARC_REG_PDCR 0xa4000106 // port D control
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#define CYGARC_REG_PECR 0xa4000108 // port E control
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#define CYGARC_REG_PFCR 0xa400010a // port F control
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#define CYGARC_REG_PGCR 0xa400010c // port G control
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#define CYGARC_REG_PHCR 0xa400010e // port H control
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#define CYGARC_REG_PJCR 0xa4000110 // port J control
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#define CYGARC_REG_PKCR 0xa4000112 // port K control
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#define CYGARC_REG_PLCR 0xa4000114 // port L control
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#define CYGARC_REG_SCPCR 0xa4000116 // SC port control
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#define CYGARC_REG_PADR 0xa4000120 // port A data
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#define CYGARC_REG_PBDR 0xa4000122 // port B data
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#define CYGARC_REG_PCDR 0xa4000124 // port C data
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#define CYGARC_REG_PDDR 0xa4000126 // port D data
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#define CYGARC_REG_PEDR 0xa4000128 // port E data
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#define CYGARC_REG_PFDR 0xa400012a // port F data
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#define CYGARC_REG_PGDR 0xa400012c // port G data
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#define CYGARC_REG_PHDR 0xa400012e // port H data
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#define CYGARC_REG_PJDR 0xa4000130 // port J data
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#define CYGARC_REG_PKDR 0xa4000132 // port K data
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#define CYGARC_REG_PLDR 0xa4000134 // port L data
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#define CYGARC_REG_SCPDR 0xa4000136 // SC port data
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// Port C
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#define CYGARC_REG_PCCR_PC7_MASK 0xc000
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#define CYGARC_REG_PCCR_PC7_shift 14
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#define CYGARC_REG_PCCR_PC6_MASK 0x3000
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#define CYGARC_REG_PCCR_PC6_shift 12
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#define CYGARC_REG_PCCR_PC5_MASK 0x0c00
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#define CYGARC_REG_PCCR_PC5_shift 10
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#define CYGARC_REG_PCCR_PC4_MASK 0x0300
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#define CYGARC_REG_PCCR_PC4_shift 8
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#define CYGARC_REG_PCCR_PC3_MASK 0x00c0
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#define CYGARC_REG_PCCR_PC3_shift 6
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#define CYGARC_REG_PCCR_PC2_MASK 0x0030
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#define CYGARC_REG_PCCR_PC2_shift 4
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#define CYGARC_REG_PCCR_PC1_MASK 0x000c
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#define CYGARC_REG_PCCR_PC1_shift 2
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#define CYGARC_REG_PCCR_PC0_MASK 0x0003
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#define CYGARC_REG_PCCR_PC0_shift 0
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#define CYGARC_REG_PCCR_MD_OTHER 0x0
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#define CYGARC_REG_PCCR_MD_OUT 0x1
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#define CYGARC_REG_PCCR_MD_IN_ON 0x2
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#define CYGARC_REG_PCCR_MD_IN_OFF 0x3
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#define CYGARC_REG_PCDR_PC7DT 0x80
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#define CYGARC_REG_PCDR_PC6DT 0x40
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#define CYGARC_REG_PCDR_PC5DT 0x20
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#define CYGARC_REG_PCDR_PC4DT 0x10
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#define CYGARC_REG_PCDR_PC3DT 0x08
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#define CYGARC_REG_PCDR_PC2DT 0x04
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#define CYGARC_REG_PCDR_PC1DT 0x02
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#define CYGARC_REG_PCDR_PC0DT 0x01
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