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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [sparc/] [arch/] [v2_0/] [include/] [hal_arch.h] - Blame information for rev 174

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#ifndef CYGONCE_HAL_ARCH_H
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#define CYGONCE_HAL_ARCH_H
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4
//==========================================================================
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//
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//      hal_arch.h
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//
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//      Architecture specific abstractions
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//
10
//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    nickg, gthomas, hmt
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// Contributors: nickg, gthomas, hmt
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// Date:         1999-02-20
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// Purpose:      Define architecture abstractions
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// Usage:        #include <cyg/hal/hal_arch.h>
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// 
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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56
#include <pkgconf/hal.h>
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#include <pkgconf/hal_sparc.h>
58
 
59
#include <cyg/infra/cyg_type.h>
60
 
61
#include <cyg/hal/hal_intr.h>           // HAL_DISABLE_INTERRUPTS
62
 
63
//--------------------------------------------------------------------------
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// Processor saved states:
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//
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// All these structures must be doubleword (64 bit) aligned.
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// The code that creates them on the stack will ensure this is so.
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69
#define HAL_THREAD_CONTEXT_GLOBAL_BASE 0
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#define HAL_THREAD_CONTEXT_OUT_BASE    8
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#define HAL_THREAD_CONTEXT_LOCAL_BASE 16
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#define HAL_THREAD_CONTEXT_IN_BASE    24
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typedef struct
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{
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    // this is the save structure found at *(stack_ptr) always, note that
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    // i[6] is the frame pointer is the previous stack pointer, and
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    // o[6] is the stack pointer is the next frame pointer,
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    // so they form a linked list back up the call stack.
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    cyg_uint32  l[8];                                   /* Locals r16-r23 */
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    cyg_uint32  i[8];                                   /* Ins    r24-r31 */
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} HAL_SavedWindow;
83
 
84
typedef struct
85
{
86
    // Window save at stack pointer
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    HAL_SavedWindow li;
88
//16
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    // This is the rest of the save state:
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    //   NOTE: g[0] is used for the CWP, for %g0 == 0.  Also note that the
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    //   assembler routines must load/store it in the right order.
92
    cyg_uint32  g[8] ;                                  /* Globals r0- r7 */
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    cyg_uint32  o[8] ;                                  /* Outs    r8-r15 */
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//32 words in size
95
 
96
// There is no need to save any other state; for example, condition codes,
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// the PC and NextPC, and Y, are preserved in local registers in the trap
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// handling window and so preserved in the caller stack frame as viewed
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// from an ISR.  Note that the VSR is jumped to with those locals being set
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// up (and Y in situ), and it must preserve them itself before calling any
101
// subsequent handlers (ISRs).
102
 
103
} HAL_SavedRegisters;
104
 
105
 
106
typedef struct
107
{
108
    // Window save at stack pointer
109
    HAL_SavedWindow li;
110
    cyg_uint32      composite_return_ptr;          /* structure returns */
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    cyg_uint32      spill_args[6];                 /* for callee to store */
112
    cyg_uint32      spare;                         /* keep this 64-bits   */
113
} HAL_FrameStructure;
114
 
115
 
116
//--------------------------------------------------------------------------
117
// Exception handling function.
118
// This function is defined by the kernel according to this prototype. It is
119
// invoked from the HAL to deal with any CPU exceptions that the HAL does
120
// not want to deal with itself. It usually invokes the kernel's exception
121
// delivery mechanism.
122
 
123
externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data );
124
 
125
//--------------------------------------------------------------------------
126
// Bit manipulation macros
127
#ifndef CYGPKG_HAL_SPARC_SCAN
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/* Most sparc's does not have 'scan' instruction */
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externC cyg_uint32 hal_lsbit_index(cyg_uint32 mask);
130
externC cyg_uint32 hal_msbit_index(cyg_uint32 mask);
131
#define HAL_LSBIT_INDEX(index, mask) index = hal_lsbit_index(mask);
132
#define HAL_MSBIT_INDEX(index, mask) index = hal_msbit_index(mask);
133
#else
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#define HAL_LSBIT_INDEX(index, mask)            \
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    CYG_MACRO_START                             \
136
    asm volatile (                              \
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        "scan   %1, 0, %%l7;"                   \
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        "mov    31, %0;"                        \
139
        "sub    %0, %%l7, %0"                   \
140
        : "=r"(index)                           \
141
        : "r"(mask & ~(mask-1))                 \
142
        : "l7"                                  \
143
        );                                      \
144
CYG_MACRO_END
145
 
146
#define HAL_MSBIT_INDEX(index, mask)            \
147
    CYG_MACRO_START                             \
148
    asm volatile (                              \
149
        "scan   %1, 0, %%l7;"                   \
150
        "mov    31, %0;"                        \
151
        "sub    %0, %%l7, %0"                   \
152
        : "=r"(index)                           \
153
        : "r"(mask)                             \
154
        : "l7"                                  \
155
        );                                      \
156
CYG_MACRO_END
157
#endif
158
 
159
//--------------------------------------------------------------------------
160
// Context Initialization
161
// Initialize the context of a thread.
162
// Arguments:
163
// _sparg_ name of variable containing current sp, will be written with new sp
164
// _thread_ thread object address, passed as argument to entry point
165
// _entry_ entry point address.
166
// _id_ bit pattern used in initializing registers, for debugging.
167
 
168
externC CYG_ADDRESS
169
hal_thread_init_context(  CYG_WORD sparg,
170
                          CYG_WORD thread,
171
                          CYG_WORD entry,
172
                          CYG_WORD id );
173
 
174
#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ )         \
175
CYG_MACRO_START                                                             \
176
    _sparg_ = hal_thread_init_context( (CYG_WORD)(_sparg_),                 \
177
                                       (CYG_WORD)(_thread_),                \
178
                                       (CYG_WORD)(_entry_),                 \
179
                                       (CYG_WORD)(_id_) );                  \
180
CYG_MACRO_END
181
 
182
//---------------------------------------------------------------------------
183
// Context switch macros.
184
// The arguments are pointers to locations where the stack pointer
185
// of the current thread is to be stored, and from where the sp of the
186
// next thread is to be fetched.
187
 
188
externC void hal_thread_switch_context( CYG_ADDRESS to, CYG_ADDRESS from );
189
externC void hal_thread_load_context( CYG_ADDRESS to )
190
    __attribute__ ((noreturn));
191
 
192
#define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_)                    \
193
        hal_thread_switch_context((CYG_ADDRESS)_tspptr_,                \
194
                                  (CYG_ADDRESS)_fspptr_);
195
 
196
#define HAL_THREAD_LOAD_CONTEXT(_tspptr_)                               \
197
        hal_thread_load_context( (CYG_ADDRESS)_tspptr_ );
198
 
199
 
200
//---------------------------------------------------------------------------
201
// Execution reorder barrier.
202
// When optimizing the compiler can reorder code. In multithreaded systems
203
// where the order of actions is vital, this can sometimes cause problems.
204
// This macro may be inserted into places where reordering should not happen.
205
 
206
#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" )
207
 
208
//---------------------------------------------------------------------------
209
// Breakpoint support
210
// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to happen
211
// if executed.
212
// HAL_BREAKINST is the value of the breakpoint instruction and 
213
// HAL_BREAKINST_SIZE is its size in bytes.
214
 
215
#define HAL_BREAKPOINT(_label_)                \
216
asm volatile (" .globl  " #_label_ ";"         \
217
              #_label_":"                      \
218
              "ta 1"                           \
219
    );
220
 
221
#define HAL_BREAKINST           {0x91,0xd0,0x20,0x01}
222
#define HAL_BREAKINST_SIZE      4
223
 
224
//---------------------------------------------------------------------------
225
// Thread register state manipulation for GDB support.
226
 
227
// Translate a stack pointer as saved by the thread context macros above into
228
// a pointer to a HAL_SavedRegisters structure.
229
#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ )  \
230
        (_regs_) = (HAL_SavedRegisters *)(_sp_)
231
 
232
// Routines in icontext.c used here because they're quite large for
233
// the SPARC (note param order):
234
externC void
235
cyg_hal_sparc_get_gdb_regs( void *gdb_regset,
236
                            HAL_SavedRegisters *eCos_regset );
237
 
238
externC void
239
cyg_hal_sparc_set_gdb_regs( HAL_SavedRegisters *eCos_regset,
240
                            void *gdb_regset );
241
 
242
 
243
// Copy a set of registers from a HAL_SavedRegisters structure into a GDB
244
// ordered array.
245
#define HAL_GET_GDB_REGISTERS( _aregval_, _regs_ )              \
246
    CYG_MACRO_START                                             \
247
        cyg_hal_sparc_get_gdb_regs( (_aregval_), (_regs_) );    \
248
CYG_MACRO_END
249
 
250
// Copy a GDB ordered array into a HAL_SavedRegisters structure.
251
#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ )             \
252
    CYG_MACRO_START                                             \
253
        cyg_hal_sparc_set_gdb_regs( (_regs_), (_aregval_) );    \
254
CYG_MACRO_END
255
 
256
//---------------------------------------------------------------------------
257
// HAL setjmp
258
 
259
#define CYGARC_JMP_BUF_SIZE 32 // (words)
260
 
261
// this too must be doubleword aligned (64 bit)
262
 
263
typedef cyg_uint64 hal_jmp_buf[ CYGARC_JMP_BUF_SIZE / 2 ];
264
 
265
externC int hal_setjmp(hal_jmp_buf env);
266
externC void hal_longjmp(hal_jmp_buf env, int val);
267
 
268
//---------------------------------------------------------------------------
269
// Flush Register Windows
270
//
271
// This is implemented as trap 3 in some SPARC systems.
272
// This macro is only for use from normal, foreground code.
273
// (including exception handlers and the like)
274
 
275
#define HAL_FLUSH_REGISTERS_TO_STACK()                                      \
276
    CYG_MACRO_START                                                         \
277
    cyg_uint32 _saveintr_;                                                  \
278
    HAL_DISABLE_INTERRUPTS( _saveintr_ ); /* leave traps on */              \
279
    asm volatile (                                                          \
280
        /* force out all our callers register sets onto the stack        */ \
281
        /* if necessary: the system will handily take care of this for   */ \
282
        /* us as follows:                                                */ \
283
        "save   %%sp, -16 * 4, %%sp;"   /* need all these to preserve    */ \
284
        "save   %%sp, -16 * 4, %%sp;"   /* the linked list property...   */ \
285
        "save   %%sp, -16 * 4, %%sp;"                                       \
286
        "save   %%sp, -16 * 4, %%sp;"                                       \
287
        "save   %%sp, -16 * 4, %%sp;"                                       \
288
        "save   %%sp, -16 * 4, %%sp;"                                       \
289
        "restore;"                                                          \
290
        "restore;"                                                          \
291
        "restore;"                                                          \
292
        "restore;"                                                          \
293
        "restore;"                                                          \
294
        "restore"                                                           \
295
        /* six of these is correct; a seventh would force out the        */ \
296
        /* current set that we are using right now.  Note that minimal   */ \
297
        /* space is allowed on stack for locals and ins in case this     */ \
298
        /* sequence itself gets interrupted and recurses too deep.       */ \
299
        :                                                                   \
300
        :                                                                   \
301
        : "memory"                                                          \
302
        );                                                                  \
303
    HAL_RESTORE_INTERRUPTS( _saveintr_ );                                   \
304
CYG_MACRO_END
305
 
306
//---------------------------------------------------------------------------
307
// Idle thread code.
308
// This macro is called in the idle thread loop, and gives the HAL the
309
// chance to insert code. Typical idle thread behaviour might be to halt the
310
// processor.
311
 
312
externC void hal_idle_thread_action(cyg_uint32 loop_count);
313
 
314
#ifndef HAL_IDLE_THREAD_ACTION
315
#define HAL_IDLE_THREAD_ACTION(_count_) \
316
      /* Cyg_Clock::real_time_clock->tick() */
317
#endif
318
 
319
//---------------------------------------------------------------------------
320
 
321
// Minimal and sensible stack sizes: the intention is that applications
322
// will use these to provide a stack size in the first instance prior to
323
// proper analysis.  Idle thread stack should be this big.
324
 
325
//    THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES.
326
//           THEY ARE HOWEVER ENOUGH TO START PROGRAMMING.
327
// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES!
328
 
329
// We define quite large stack needs for SPARC, for it requires 576
330
// bytes (144 words) to process an interrupt and thread-switch, and
331
// momentarily, but needed in case of recursive interrupts, it needs 208
332
// words - if a sequence of saves to push out other regsets is interrupted.
333
 
334
// This is not a config option because it should not be adjusted except
335
// under "enough rope" sort of disclaimers.
336
 
337
// A minimal, optimized stack frame is 24 words, but even -O2 code seems to
338
// place a few locals in the locals area: round this up to provide a
339
// sensible overestimate:
340
#define CYGNUM_HAL_STACK_FRAME_SIZE (4 * 32)
341
 
342
// Stack needed for a context switch: this is implicit in the estimate for
343
// interrupts so not explicitly used below:
344
#define CYGNUM_HAL_STACK_CONTEXT_SIZE (4 * 32)
345
 
346
// Interrupt + call to ISR, interrupt_end() and the DSR
347
#define CYGNUM_HAL_STACK_INTERRUPT_SIZE \
348
    ((208 * 4) + 2 * CYGNUM_HAL_STACK_FRAME_SIZE)
349
 
350
// And we have lots of registers so no particular amount is added in for
351
// typical local variable usage.
352
 
353
// Typically we have 4 nestable interrupt sources, clock, serialin,
354
// serialout, (and NMI button, but you want it to not destroy context):
355
 
356
#define CYGNUM_HAL_STACK_SIZE_MINIMUM \
357
        (4 * CYGNUM_HAL_STACK_INTERRUPT_SIZE + 2 * CYGNUM_HAL_STACK_FRAME_SIZE)
358
 
359
#define CYGNUM_HAL_STACK_SIZE_TYPICAL \
360
        (CYGNUM_HAL_STACK_SIZE_MINIMUM + 8 * CYGNUM_HAL_STACK_FRAME_SIZE)
361
 
362
//--------------------------------------------------------------------------
363
// Macros for switching context between two eCos instances (jump from
364
// code in ROM to code in RAM or vice versa).
365
#define CYGARC_HAL_SAVE_GP()
366
#define CYGARC_HAL_RESTORE_GP()
367
 
368
//-----------------------------------------------------------------------------
369
 
370
#endif // CYGONCE_HAL_ARCH_H
371
// End of hal_arch.h

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