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#ifndef CYGONCE_HAL_INTR_H
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#define CYGONCE_HAL_INTR_H
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//===========================================================================
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//
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// hal_intr.h
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//
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// HAL Interrupt and clock support
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//
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//===========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//===========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): nickg, gthomas, hmt
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// Contributors: nickg, gthomas, hmt,
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// jlarmour
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// Date: 1999-02-20, 2002-03-08
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// Purpose: Define Interrupt support
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// Description: The macros defined here provide the HAL APIs for handling
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// interrupts and the clock.
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//
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// Usage:
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// #include <cyg/hal/hal_intr.h>
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// ...
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//
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//
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//####DESCRIPTIONEND####
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//
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//===========================================================================
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#include <pkgconf/hal.h>
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#include <pkgconf/hal_sparc.h>
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#include <cyg/infra/cyg_type.h>
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//---------------------------------------------------------------------------
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// SPARC exception vectors.
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//
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// A note on nomenclature:
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//
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// SPARC has traps: interrupts are traps, and so are exceptions.
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// There are 255 of them in the hardware: this HAL's trampoline code decodes
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// them into the 27 listed below as CYGNUM_HAL_VECTOR_xxx.
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// They are handled uniformly in the trampoline code in the sense that
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// each vector has a VSR which is called in the same way.
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// Interrupts (vectors 1-15) have one VSR by default, exceptions (vectors
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// 16-26) another.
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// The interrupt VSR sets up a C stack and calls the corresponding ISR with
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// the required arguments; this ABI is mandated by the kernel.
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// The exception VSR sets up a C stack and calls the corresponding XSR
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// (just an entry in the ISR[sic] table) with similar arguments, such that
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// it (by default) can call the kernel's cyg_hal_deliver_exception().
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//
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// So:
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// CYGNUM_HAL_VSR_MAX/MIN/COUNT describe the number of VSR entries *and*
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// the number of ISR (and associated data) entries (including those which
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// are XSRs, just a special case of ISRs).
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// CYGNUM_HAL_ISR_MAX/MIN/COUNT describe the number of interrupt sources
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// and is used for bounds checking in kernel interrupt objects.
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// CYGNUM_HAL_EXCEPTION_MAX/MIN/COUNT describe vector numbers which have
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// by default the exception VSR and default XSR installed.
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// These correspond to VSRs and the values are the ones to use for
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// HAL_VSR_GET/SET
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#define CYGNUM_HAL_VECTOR_RESERVED_0 0
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#define CYGNUM_HAL_VECTOR_INTERRUPT_1 1 // NB: least important
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#define CYGNUM_HAL_VECTOR_INTERRUPT_2 2 // (lowest priority)
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#define CYGNUM_HAL_VECTOR_INTERRUPT_3 3
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#define CYGNUM_HAL_VECTOR_INTERRUPT_4 4
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#define CYGNUM_HAL_VECTOR_INTERRUPT_5 5
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#define CYGNUM_HAL_VECTOR_INTERRUPT_6 6
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#define CYGNUM_HAL_VECTOR_INTERRUPT_7 7
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#define CYGNUM_HAL_VECTOR_INTERRUPT_8 8
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#define CYGNUM_HAL_VECTOR_INTERRUPT_9 9
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#define CYGNUM_HAL_VECTOR_INTERRUPT_10 10
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#define CYGNUM_HAL_VECTOR_INTERRUPT_11 11
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#define CYGNUM_HAL_VECTOR_INTERRUPT_12 12
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#define CYGNUM_HAL_VECTOR_INTERRUPT_13 13
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#define CYGNUM_HAL_VECTOR_INTERRUPT_14 14 // (highest priority)
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#define CYGNUM_HAL_VECTOR_INTERRUPT_15 15 // NB: most important (NMI)
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#define CYG_VECTOR_IS_INTERRUPT(v) (15 >= (v))
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#define CYGNUM_HAL_VECTOR_USER_TRAP 16 // Ticc instructions
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#define CYGNUM_HAL_VECTOR_FETCH_ABORT 17 // trap type 1
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#define CYGNUM_HAL_VECTOR_ILLEGAL_OP 18 // trap type 2
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#define CYGNUM_HAL_VECTOR_PRIV_OP 19 // tt 3: privileged op
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#define CYGNUM_HAL_VECTOR_NOFPCP 20 // tt 4,36: FP or coproc
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#define CYGNUM_HAL_VECTOR_RESERVED_1 21 // (not used)
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#define CYGNUM_HAL_VECTOR_RESERVED_2 22 // (not used)
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#define CYGNUM_HAL_VECTOR_UNALIGNED 23 // tt 7: unaligned memory access
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#define CYGNUM_HAL_VECTOR_TT_EIGHT 24 // tt 8: not defined
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#define CYGNUM_HAL_VECTOR_DATA_ABORT 25 // tt 9: read/write failed
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#define CYGNUM_HAL_VECTOR_OTHERS 26 // any others
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#define CYGNUM_HAL_VSR_MIN 0
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#define CYGNUM_HAL_VSR_MAX 26
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#define CYGNUM_HAL_VSR_COUNT 27
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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// Interrupt vectors. These are the values used with HAL_INTERRUPT_ATTACH()
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// et al
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#define CYGNUM_HAL_INTERRUPT_RESERVED_0 CYGNUM_HAL_VECTOR_RESERVED_0
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#define CYGNUM_HAL_INTERRUPT_1 CYGNUM_HAL_VECTOR_INTERRUPT_1
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#define CYGNUM_HAL_INTERRUPT_2 CYGNUM_HAL_VECTOR_INTERRUPT_2
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#define CYGNUM_HAL_INTERRUPT_3 CYGNUM_HAL_VECTOR_INTERRUPT_3
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#define CYGNUM_HAL_INTERRUPT_4 CYGNUM_HAL_VECTOR_INTERRUPT_4
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#define CYGNUM_HAL_INTERRUPT_5 CYGNUM_HAL_VECTOR_INTERRUPT_5
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#define CYGNUM_HAL_INTERRUPT_6 CYGNUM_HAL_VECTOR_INTERRUPT_6
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#define CYGNUM_HAL_INTERRUPT_7 CYGNUM_HAL_VECTOR_INTERRUPT_7
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#define CYGNUM_HAL_INTERRUPT_8 CYGNUM_HAL_VECTOR_INTERRUPT_8
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#define CYGNUM_HAL_INTERRUPT_9 CYGNUM_HAL_VECTOR_INTERRUPT_9
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#define CYGNUM_HAL_INTERRUPT_10 CYGNUM_HAL_VECTOR_INTERRUPT_10
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#define CYGNUM_HAL_INTERRUPT_11 CYGNUM_HAL_VECTOR_INTERRUPT_11
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#define CYGNUM_HAL_INTERRUPT_12 CYGNUM_HAL_VECTOR_INTERRUPT_12
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#define CYGNUM_HAL_INTERRUPT_13 CYGNUM_HAL_VECTOR_INTERRUPT_13
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#define CYGNUM_HAL_INTERRUPT_14 CYGNUM_HAL_VECTOR_INTERRUPT_14
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#define CYGNUM_HAL_INTERRUPT_15 CYGNUM_HAL_VECTOR_INTERRUPT_15
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#define CYGNUM_HAL_ISR_MIN 0
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#define CYGNUM_HAL_ISR_MAX 15
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#define CYGNUM_HAL_ISR_COUNT 16
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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// Exception vectors. These are the values used when passed out to an
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// external exception handler using cyg_hal_deliver_exception()
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// They can also be used with HAL_INTERRUPT_ATTACH() et al to install
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// different XSRs.
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#define CYGNUM_HAL_EXCEPTION_TRAP CYGNUM_HAL_VECTOR_USER_TRAP
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#define CYGNUM_HAL_EXCEPTION_CODE_ACCESS CYGNUM_HAL_VECTOR_FETCH_ABORT
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#define CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION \
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CYGNUM_HAL_VECTOR_ILLEGAL_OP
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#define CYGNUM_HAL_EXCEPTION_PRIVILEGED_INSTRUCTION \
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CYGNUM_HAL_VECTOR_PRIV_OP
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#define CYGNUM_HAL_EXCEPTION_FPU_NOT_AVAIL CYGNUM_HAL_VECTOR_NOFPCP
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#define CYGNUM_HAL_EXCEPTION_RESERVED1 CYGNUM_HAL_VECTOR_RESERVED1
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#define CYGNUM_HAL_EXCEPTION_RESERVED2 CYGNUM_HAL_VECTOR_RESERVED2
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#define CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS \
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CYGNUM_HAL_VECTOR_UNALIGNED
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#define CYGNUM_HAL_EXCEPTION_TT_EIGHT CYGNUM_HAL_VECTOR_TT_EIGHT
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#define CYGNUM_HAL_EXCEPTION_DATA_ACCESS CYGNUM_HAL_VECTOR_DATA_ABORT
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#define CYGNUM_HAL_EXCEPTION_OTHERS CYGNUM_HAL_VECTOR_OTHERS
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#define CYGNUM_HAL_EXCEPTION_MIN 16
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#define CYGNUM_HAL_EXCEPTION_MAX (16 + 10)
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#define CYGNUM_HAL_EXCEPTION_COUNT (1 + CYGNUM_HAL_EXCEPTION_MAX - \
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CYGNUM_HAL_EXCEPTION_MIN)
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//---------------------------------------------------------------------------
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// (Null) Translation from a wider space of interrupt sources:
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#define HAL_TRANSLATE_VECTOR(_vector_,_index_) _index_ = (_vector_)
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//---------------------------------------------------------------------------
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// Routine to execute DSRs using separate interrupt stack
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#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
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externC void hal_interrupt_stack_call_pending_DSRs(void);
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#define HAL_INTERRUPT_STACK_CALL_PENDING_DSRS() \
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hal_interrupt_stack_call_pending_DSRs()
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// these are offered solely for stack usage testing
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// if they are not defined, then there is no interrupt stack.
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#define HAL_INTERRUPT_STACK_BASE cyg_interrupt_stack_base
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#define HAL_INTERRUPT_STACK_TOP cyg_interrupt_stack
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// use them to declare these extern however you want:
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// extern char HAL_INTERRUPT_STACK_BASE[];
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// extern char HAL_INTERRUPT_STACK_TOP[];
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// is recommended
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#endif
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//---------------------------------------------------------------------------
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// Static data used by HAL
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// VSR table
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externC volatile CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_COUNT];
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// ISR + XSR tables - so VSR count.
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externC volatile CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_VSR_COUNT];
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externC volatile CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_VSR_COUNT];
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externC volatile CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_VSR_COUNT];
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// (interrupt_objects only used in the interrupt case _but_ the interrupt
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// attach &co macros write it, so keep it full-sized)
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//---------------------------------------------------------------------------
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// Default ISRs for exception/interrupt handing.
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// note that these have the same ABI apart from the extra SP parameter
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// for exceptions.
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externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data);
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// return code from ISR is passed to interrupt_end() in the kernel.
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externC void cyg_hal_exception_handler(CYG_ADDRWORD vector,
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CYG_ADDRWORD data,
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CYG_ADDRWORD stackpointer);
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//---------------------------------------------------------------------------
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// Default VSRs for exception/interrupt handing.
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// note that these do not have a C ABI as such; they are *vector* service
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// routines and are written in assembler.
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externC void hal_default_exception_vsr( void );
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externC void hal_default_interrupt_vsr( void );
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//---------------------------------------------------------------------------
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// Interrupt state storage
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typedef cyg_uint32 CYG_INTERRUPT_STATE;
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//---------------------------------------------------------------------------
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// Interrupt control macros
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// THIS ONE IS NOT A STANDARD HAL ENTRY (HAL_DISABLE_TRAPS)
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// (so should be unused externally)
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#define HAL_DISABLE_TRAPS(_old_) \
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asm volatile ( \
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"rd %%psr, %0;" \
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"andn %0, 0x20, %%l7;" \
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"wr %%l7, %%psr;" \
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"nop; nop; nop" \
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: "=r"(_old_) \
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: \
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: "l7" \
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);
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// THIS ONE IS NOT A STANDARD HAL ENTRY (HAL_QUERY_TRAPS)
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// (so should be unused externally)
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#define HAL_QUERY_TRAPS(_old_) \
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asm volatile ( \
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"rd %%psr, %%l7;" \
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"and %%l7, 0x020, %0" \
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: "=r"(_old_) \
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: \
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: "l7" \
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);
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#define HAL_DISABLE_INTERRUPTS(_old_) \
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asm volatile ( \
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"rd %%psr, %0;" \
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"or %0, 0xf00, %%l7;" \
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"wr %%l7, %%psr;" \
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"nop; nop; nop" \
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: "=r"(_old_) \
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: \
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: "l7" \
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);
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#define HAL_ENABLE_INTERRUPTS() \
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asm volatile ( \
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"rd %%psr, %%l7;" \
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"andn %%l7, 0xf00, %%l7;" \
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"or %%l7, 0x020, %%l7;" \
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"wr %%l7, %%psr;" \
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"nop; nop; nop" \
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: \
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: \
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| 300 |
|
|
: "l7" \
|
| 301 |
|
|
);
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| 302 |
|
|
|
| 303 |
|
|
#define HAL_RESTORE_INTERRUPTS(_old_) \
|
| 304 |
|
|
asm volatile ( \
|
| 305 |
|
|
"rd %%psr, %%l7;" \
|
| 306 |
|
|
"andn %%l7, 0xf20, %%l7;" \
|
| 307 |
|
|
"and %0 , 0xf20, %%l6;" \
|
| 308 |
|
|
"wr %%l6, %%l7, %%psr;" \
|
| 309 |
|
|
"nop; nop; nop" \
|
| 310 |
|
|
: \
|
| 311 |
|
|
: "r"(_old_) \
|
| 312 |
|
|
: "l6","l7" \
|
| 313 |
|
|
);
|
| 314 |
|
|
|
| 315 |
|
|
#define HAL_QUERY_INTERRUPTS(_old_) \
|
| 316 |
|
|
asm volatile ( \
|
| 317 |
|
|
"rd %%psr, %%l7;" \
|
| 318 |
|
|
"and %%l7, 0xf00, %%l7;" \
|
| 319 |
|
|
"xor %%l7, 0xf00, %0" \
|
| 320 |
|
|
: "=r"(_old_) \
|
| 321 |
|
|
: \
|
| 322 |
|
|
: "l7" \
|
| 323 |
|
|
);
|
| 324 |
|
|
|
| 325 |
|
|
|
| 326 |
|
|
//---------------------------------------------------------------------------
|
| 327 |
|
|
// Interrupt and VSR attachment macros
|
| 328 |
|
|
|
| 329 |
|
|
#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \
|
| 330 |
|
|
CYG_MACRO_START \
|
| 331 |
|
|
cyg_uint32 _index_; \
|
| 332 |
|
|
HAL_TRANSLATE_VECTOR ((_vector_), _index_); \
|
| 333 |
|
|
\
|
| 334 |
|
|
if( (CYG_ADDRESS)hal_default_isr == hal_interrupt_handlers[_vector_] || \
|
| 335 |
|
|
(CYG_ADDRESS)cyg_hal_exception_handler == \
|
| 336 |
|
|
hal_interrupt_handlers[_vector_] ) { \
|
| 337 |
|
|
(_state_) = 0; \
|
| 338 |
|
|
} else { \
|
| 339 |
|
|
(_state_) = 1; \
|
| 340 |
|
|
} \
|
| 341 |
|
|
CYG_MACRO_END
|
| 342 |
|
|
|
| 343 |
|
|
#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \
|
| 344 |
|
|
CYG_MACRO_START \
|
| 345 |
|
|
if( (CYG_ADDRESS)hal_default_isr == hal_interrupt_handlers[_vector_] ||\
|
| 346 |
|
|
(CYG_ADDRESS)cyg_hal_exception_handler == \
|
| 347 |
|
|
hal_interrupt_handlers[_vector_] ) \
|
| 348 |
|
|
{ \
|
| 349 |
|
|
hal_interrupt_handlers[_vector_] = (CYG_ADDRESS)_isr_; \
|
| 350 |
|
|
hal_interrupt_data[_vector_] = (CYG_ADDRWORD) _data_; \
|
| 351 |
|
|
hal_interrupt_objects[_vector_] = (CYG_ADDRESS)_object_; \
|
| 352 |
|
|
} \
|
| 353 |
|
|
CYG_MACRO_END
|
| 354 |
|
|
|
| 355 |
|
|
#define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) CYG_MACRO_START \
|
| 356 |
|
|
if( hal_interrupt_handlers[_vector_] == (CYG_ADDRESS)_isr_ ) \
|
| 357 |
|
|
{ \
|
| 358 |
|
|
hal_interrupt_handlers[_vector_] = \
|
| 359 |
|
|
(CYG_VECTOR_IS_INTERRUPT( _vector_ ) \
|
| 360 |
|
|
? (CYG_ADDRESS)hal_default_isr \
|
| 361 |
|
|
: (CYG_ADDRESS)cyg_hal_exception_handler); \
|
| 362 |
|
|
hal_interrupt_data[_vector_] = 0; \
|
| 363 |
|
|
hal_interrupt_objects[_vector_] = 0; \
|
| 364 |
|
|
} \
|
| 365 |
|
|
CYG_MACRO_END
|
| 366 |
|
|
|
| 367 |
|
|
#define HAL_VSR_GET( _vector_, _pvsr_ ) \
|
| 368 |
|
|
*(CYG_ADDRESS *)(_pvsr_) = hal_vsr_table[_vector_];
|
| 369 |
|
|
|
| 370 |
|
|
|
| 371 |
|
|
#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) CYG_MACRO_START \
|
| 372 |
|
|
if( _poldvsr_ != NULL ) \
|
| 373 |
|
|
*(CYG_ADDRESS *)_poldvsr_ = hal_vsr_table[_vector_]; \
|
| 374 |
|
|
hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_; \
|
| 375 |
|
|
CYG_MACRO_END
|
| 376 |
|
|
|
| 377 |
|
|
// This is an ugly name, but what it means is: grab the VSR back to eCos
|
| 378 |
|
|
// internal handling, or if you like, the default handler. But if
|
| 379 |
|
|
// cooperating with GDB and CygMon, the default behaviour is to pass most
|
| 380 |
|
|
// exceptions to CygMon. This macro undoes that so that eCos handles the
|
| 381 |
|
|
// exception. So use it with care.
|
| 382 |
|
|
|
| 383 |
|
|
#define HAL_VSR_SET_TO_ECOS_HANDLER( _vector_, _poldvsr_ ) CYG_MACRO_START \
|
| 384 |
|
|
if( _poldvsr_ != NULL ) \
|
| 385 |
|
|
*(CYG_ADDRESS *)_poldvsr_ = hal_vsr_table[_vector_]; \
|
| 386 |
|
|
hal_vsr_table[_vector_] = ( CYG_VECTOR_IS_INTERRUPT( _vector_ ) \
|
| 387 |
|
|
? (CYG_ADDRESS)hal_default_interrupt_vsr \
|
| 388 |
|
|
: (CYG_ADDRESS)hal_default_exception_vsr ); \
|
| 389 |
|
|
CYG_MACRO_END
|
| 390 |
|
|
|
| 391 |
|
|
|
| 392 |
|
|
|
| 393 |
|
|
//---------------------------------------------------------------------------
|
| 394 |
|
|
|
| 395 |
|
|
// Which PIC (if any) is available is dependent on the board.
|
| 396 |
|
|
// This sets up that stuff:
|
| 397 |
|
|
|
| 398 |
|
|
#include <cyg/hal/hal_xpic.h>
|
| 399 |
|
|
|
| 400 |
|
|
// Ditto the clock(s)
|
| 401 |
|
|
// This defines all the clock macros the kernel requires:
|
| 402 |
|
|
|
| 403 |
|
|
#include <cyg/hal/hal_clock.h>
|
| 404 |
|
|
|
| 405 |
|
|
//---------------------------------------------------------------------------
|
| 406 |
|
|
#endif // ifndef CYGONCE_HAL_INTR_H
|
| 407 |
|
|
// End of hal_intr.h
|
