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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [sparc/] [arch/] [v2_0/] [src/] [hal_intr.c] - Blame information for rev 565

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//==========================================================================
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//
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//      hal_intr.c
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//
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//      SPARC Architecture specific interrupt dispatch tables
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):    hmt
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// Contributors: hmt
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// Date:         1999-02-20
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// Purpose:      Interrupt handler tables for SPARC.
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//              
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//####DESCRIPTIONEND####
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//
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//==========================================================================
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#include <cyg/hal/hal_intr.h>
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#include <cyg/hal/hal_arch.h>
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#include <cyg/infra/cyg_ass.h> // for CYG_FAIL() below
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// ------------------------------------------------------------------------
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// First level C default interrupt handler.
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//static int count = 0;
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cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
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{
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    return 0; // 0x1def0000 + vector + (count += 0x0100);
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}
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// ------------------------------------------------------------------------
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// First level C exception handler.
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externC void __handle_exception (void);
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externC HAL_SavedRegisters *_hal_registers;
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void cyg_hal_exception_handler(CYG_ADDRWORD vector, CYG_ADDRWORD data,
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                               CYG_ADDRWORD stackpointer )
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{
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#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
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    // Set the pointer to the registers of the current exception
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    // context. At entry the GDB stub will expand the
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    // HAL_SavedRegisters structure into a (bigger) register array.
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    _hal_registers = (HAL_SavedRegisters *)stackpointer;
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    __handle_exception();
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#elif defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && \
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      defined(CYGPKG_HAL_EXCEPTIONS)
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    // We should decode the vector and pass a more appropriate
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    // value as the second argument. For now we simply pass a
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    // pointer to the saved registers. We should also divert
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    // breakpoint and other debug vectors into the debug stubs.
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    cyg_hal_deliver_exception( vector, stackpointer );
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#else
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    CYG_FAIL("Exception!!!");
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#endif    
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    return;
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}
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// ISR tables
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volatile
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CYG_ADDRESS    hal_interrupt_handlers[CYGNUM_HAL_VSR_COUNT] = {
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    (CYG_ADDRESS)hal_default_isr,
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    (CYG_ADDRESS)hal_default_isr,
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    (CYG_ADDRESS)hal_default_isr,
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    (CYG_ADDRESS)hal_default_isr,
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    (CYG_ADDRESS)hal_default_isr,
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    (CYG_ADDRESS)hal_default_isr,
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    (CYG_ADDRESS)hal_default_isr,
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    (CYG_ADDRESS)hal_default_isr,
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    (CYG_ADDRESS)hal_default_isr,
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    (CYG_ADDRESS)hal_default_isr,
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    (CYG_ADDRESS)hal_default_isr,
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    (CYG_ADDRESS)hal_default_isr,
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    (CYG_ADDRESS)hal_default_isr,
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    (CYG_ADDRESS)hal_default_isr,
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    (CYG_ADDRESS)hal_default_isr,
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    (CYG_ADDRESS)hal_default_isr,  /* 16 of these */
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    (CYG_ADDRESS)cyg_hal_exception_handler,
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    (CYG_ADDRESS)cyg_hal_exception_handler,
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    (CYG_ADDRESS)cyg_hal_exception_handler,
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    (CYG_ADDRESS)cyg_hal_exception_handler,
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    (CYG_ADDRESS)cyg_hal_exception_handler,
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    (CYG_ADDRESS)cyg_hal_exception_handler,
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    (CYG_ADDRESS)cyg_hal_exception_handler,
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    (CYG_ADDRESS)cyg_hal_exception_handler,
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    (CYG_ADDRESS)cyg_hal_exception_handler,
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    (CYG_ADDRESS)cyg_hal_exception_handler,
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    (CYG_ADDRESS)cyg_hal_exception_handler, /* 11 of these */
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};
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volatile
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CYG_ADDRWORD   hal_interrupt_data[CYGNUM_HAL_VSR_COUNT] = {
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 0x11da1a00, 0x11da1a01, 0x11da1a02, 0x11da1a03,
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 0x11da1a04, 0x11da1a05, 0x11da1a06, 0x11da1a07,
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 0x11da1a08, 0x11da1a09, 0x11da1a0a, 0x11da1a0b,
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 0x11da1a0c, 0x11da1a0d, 0x11da1a0e, 0x11da1a0f,
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 0xeeda1a00, 0xeeda1a01, 0xeeda1a02, 0xeeda1a03, 0xeeda1a04,
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 0xeeda1a05, 0xeeda1a06, 0xeeda1a07, 0xeeda1a08, 0xeeda1a09,
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 0xeeda1a0A
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};
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volatile
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CYG_ADDRESS    hal_interrupt_objects[CYGNUM_HAL_VSR_COUNT] = {
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    0,    0,    0,    0,
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    0,    0,    0,    0,
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    0,    0,    0,    0,
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    0,    0,    0,    0,
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    0,    0,    0,    0,    0,
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    0,    0,    0,    0,    0,
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    0,
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};
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// EOF hal_intr.c

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