OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [sparc/] [arch/] [v2_0/] [src/] [vec_xvsr.S] - Blame information for rev 631

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 unneback
/*===========================================================================
2
//
3
//      vec_xvsr.S
4
//
5
//      SPARC vectors: exception vector service routine
6
//
7
//===========================================================================
8
//####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under
14
// the terms of the GNU General Public License as published by the Free
15
// Software Foundation; either version 2 or (at your option) any later version.
16
//
17
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
20
// for more details.
21
//
22
// You should have received a copy of the GNU General Public License along
23
// with eCos; if not, write to the Free Software Foundation, Inc.,
24
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25
//
26
// As a special exception, if other files instantiate templates or use macros
27
// or inline functions from this file, or you compile this file and link it
28
// with other works to produce a work based on this file, this file does not
29
// by itself cause the resulting work to be covered by the GNU General Public
30
// License. However the source code for this file must still be made available
31
// in accordance with section (3) of the GNU General Public License.
32
//
33
// This exception does not invalidate any other reasons why a work based on
34
// this file might be covered by the GNU General Public License.
35
//
36
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37
// at http://sources.redhat.com/ecos/ecos-license/
38
// -------------------------------------------
39
//####ECOSGPLCOPYRIGHTEND####
40
//===========================================================================
41
//#####DESCRIPTIONBEGIN####
42
//
43
// Author(s):    hmt
44
// Contributors: hmt
45
// Date:         1999-02-20
46
// Purpose:      SPARC vector code
47
// Description:  see vectors.S; this is the default vector service routine
48
//               for exceptions.
49
//
50
//####DESCRIPTIONEND####
51
//
52
//=========================================================================*/
53
 
54
!-----------------------------------------------------------------------------
55
 
56
//      .file   "vec_xvsr.S"
57
 
58
!----------------------------------------------------------------------------
59
 
60
#include 
61
#include 
62
 
63
#ifdef CYGPKG_KERNEL
64
# include 
65
#endif
66
 
67
!------------------------------------------------------------------------
68
 
69
#include 
70
 
71
#define DELAYS_AFTER_WRPSR_SAME_WINDOW
72
#define DELAYS_AFTER_WRWIM
73
 
74
!------------------------------------------------------------------------
75
 
76
        .text
77
 
78
!---------------------------------------------------------------------------
79
! default exception handler VSR, which calls the appropriate ISR after
80
! interrupt masking - much the same as the interrupt VSR but does not lock
81
! scheduler or call interrupt_end().
82
 
83
        .global hal_default_exception_vsr
84
hal_default_exception_vsr:
85
        ! here,locals have been set up as follows:
86
        ! %l0 = psr (with this CWP/window-level in it)
87
        ! %l1 = pc
88
        ! %l2 = npc
89
        ! %l3 = vector number (16-25 for traps)
90
        ! and we are in our own register window, though it is likely that
91
        ! the next one will need to be saved before we can use it:
92
        ! ie. this one is the invalid register window.
93
 
94
        ! must establish a safe stack before re-enabling interrupts + traps
95
        and     %l0, __WINBITS, %l7     ! CWP extracted
96
        ! no inc/dec here, so no need for special measures for not-8-windows
97
        mov     1, %l6
98
        sll     %l6, %l7, %l6           ! 1 << CWP
99
        rd      %wim, %l5
100
        cmp     %l5, %l6                ! are they the same?
101
        bne     1f                      ! No, so the stack is OK as is.
102
 
103
        ! now do by hand an overflow trap, effectively
104
        mov     %g1, %l7                ! (DELAY SLOT)
105
        srl     %l5, 1, %l5
106
        sll     %l6, __WINSIZE-1, %l6
107
        or      %l6, %l5, %g1           ! new WIM in %g1 so we can get it
108
                                        ! within the save:
109
        save                            ! Slip into next window
110
        mov     %g1, %wim               ! Install the new wim
111
                                        ! (invalidates current window!)
112
#ifdef DELAYS_AFTER_WRWIM
113
        nop
114
        nop
115
        nop
116
#endif
117
 
118
        std     %l0, [%sp + 0 * 4]      ! save L & I registers
119
        std     %l2, [%sp + 2 * 4]
120
        std     %l4, [%sp + 4 * 4]
121
        std     %l6, [%sp + 6 * 4]
122
 
123
        std     %i0, [%sp + 8 * 4]
124
        std     %i2, [%sp + 10 * 4]
125
        std     %i4, [%sp + 12 * 4]
126
        std     %i6, [%sp + 14 * 4]
127
 
128
        restore                         ! Go back to trap window.
129
        mov     %l7, %g1                ! Restore %g1
130
 
131
1:      ! now save away the regs we must preserve
132
        sub     %fp, 32 * 4, %sp
133
        ! save a maximal context regardless: see also
134
        ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
135
        std     %l0, [%sp + 0 * 4]      ! save L & I registers
136
        std     %l2, [%sp + 2 * 4]
137
        std     %l4, [%sp + 4 * 4]
138
        std     %l6, [%sp + 6 * 4]
139
 
140
        std     %i0, [%sp + 8 * 4]
141
        std     %i2, [%sp + 10 * 4]
142
        std     %i4, [%sp + 12 * 4]
143
        std     %i6, [%sp + 14 * 4]
144
 
145
        st      %g1, [%sp + 17 * 4]     ! save G registers
146
        std     %g2, [%sp + 18 * 4]
147
        std     %g4, [%sp + 20 * 4]
148
        std     %g6, [%sp + 22 * 4]
149
 
150
        ! no point whatsoever in saving O registers
151
 
152
        ! and save the CWP in %g0 save place
153
        st      %l0, [%sp + 16 * 4]
154
 
155
        sub     %sp, 24 * 4, %sp        ! fresh frame including
156
                                        ! arg spill area for callees
157
 
158
        ! do not lock the scheduler
159
 
160
        ! HELP_GDB_WITH_BACKTRACE
161
        mov     %i7, %l5                ! preserve it JIC
162
        mov     %l1, %i7                ! bogus return link here
163
 
164
        ! and we must preserve the Y register (multiply/divide auxiliary)
165
        ! over these calls; we will keep it in %l4 which is otherwise unused.
166
        rd      %y, %l4
167
 
168
        ! Now we can reenable traps (preserving interrupt level)
169
        or      %l0, 0x0e0, %l7         ! set ET (+S,PS), preserve PIL
170
        wr      %l7, %psr               ! and enable!
171
#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW
172
        nop
173
        nop
174
        nop
175
#endif
176
        ! now call the XSR and so on with the appropriate args:
177
        ! ie.
178
        ! isr_retcode = (*(hal_interrupt_handlers[ vector ]))
179
        !                   ( vector, hal_interrupt_data[ vector ], stackp );
180
 
181
        ! from hal_arch.h
182
        !// ISR tables
183
        !CYG_ADDRESS    hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];
184
        !CYG_ADDRWORD   hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];
185
        !CYG_ADDRESS    hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];
186
 
187
        mov     %l3, %o0
188
        sll     %l3, 2, %l3             ! %l3 to a word offset
189
        sethi   %hi(hal_interrupt_data), %l7
190
        or      %l7, %lo(hal_interrupt_data), %l7
191
        ld      [ %l7 + %l3 ], %o1      ! data
192
        add     %sp, 24 * 4, %o2        ! stackpointer of saved regset
193
 
194
        sethi   %hi(hal_interrupt_handlers), %l7
195
        or      %l7, %lo(hal_interrupt_handlers), %l7
196
        ld      [ %l7 + %l3 ], %l6
197
        call    %l6
198
        nop
199
 
200
        ! do not call _interrupt_end()
201
 
202
        ! restore the Y register having done our callouts to C
203
        wr      %l4, %y
204
 
205
        ! We can reinstall the original CWP here; even if interrupt_end()
206
        ! performed a reschedule (ie. yield/resume pair) we will be in the
207
        ! same window.  The window is preserved by reschedule precisely
208
        ! because it is impossible atomically to disable traps here without
209
        ! involving a CWP living in a register for a time when other
210
        ! interrupts may occur.
211
 
212
        ! disable traps (using the saved psr is fastest way)
213
        wr      %l0, %psr       ! restores flags, disables traps, same PIL.
214
#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW
215
        nop
216
        nop
217
        nop
218
#endif
219
        ! HELP_GDB_WITH_BACKTRACE
220
        mov     %l5, %i7        ! restore (unused) return link
221
 
222
        ! and restore other saved regs
223
        add     %sp, 24 * 4, %sp        ! undo fresh frame
224
        ! restore a maximal context regardless: see also
225
        ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
226
        ldd     [%sp + 0 * 4], %l0      ! restore L & I registers
227
        ldd     [%sp + 2 * 4], %l2      ! to support the handler
228
        ldd     [%sp + 4 * 4], %l4      ! having messed with them.
229
        ldd     [%sp + 6 * 4], %l6
230
 
231
        ldd     [%sp + 8 * 4], %i0
232
        ldd     [%sp + 10 * 4], %i2
233
        ldd     [%sp + 12 * 4], %i4
234
        ldd     [%sp + 14 * 4], %i6
235
 
236
        ld      [%sp + 17 * 4], %g1     ! and G registers
237
        ldd     [%sp + 18 * 4], %g2
238
        ldd     [%sp + 20 * 4], %g4
239
        ldd     [%sp + 22 * 4], %g6
240
        ! no point whatsoever in loading back O registers.
241
 
242
        ! Now test for window underflow here and fix up if needs be.
243
        !
244
        ! Why?  interrupt_end() might have yielded us, when only
245
        ! its own frame was restored; its own return to us caused a
246
        ! window underflow trap, as would our return to interruptee
247
        ! unless we deal with it now.
248
 
249
        add     %l0, 1, %l7             ! interruptee~s CWP plus noise
250
        and     %l7, __WINBITS, %l7     ! CWP only
251
#if 8 == __WINSIZE
252
        ! it is in range already
253
#else   // expect 5 or 6 or 7 windows
254
        cmp     %l7, __WINSIZE
255
        bge,a   567f                    ! taken: do delay slot, handle overflow
256
         mov    0, %l7                  ! only if .ge. above
257
567:
258
#endif
259
        mov     1, %l6
260
        sll     %l6, %l7, %l6           ! 1 << CWP
261
        rd      %wim, %l5
262
        cmp     %l5, %l6                ! are they the same?
263
        bne     2f                      ! No, so the stack is OK as is.
264
 
265
        ! now do by hand an underflow trap, effectively
266
        sll     %l5, 1, %l5             ! Rotate wim left
267
        srl     %l6, __WINSIZE-1, %l6
268
        wr      %l5, %l6, %wim
269
#ifdef DELAYS_AFTER_WRWIM
270
        nop                             ! are these delays needed?
271
        nop                             ! (following restore uses wim)
272
        nop
273
#endif
274
        restore                         ! Interruptee~s window
275
        ldd     [%sp + 0 * 4], %l0      ! restore L & I registers
276
        ldd     [%sp + 2 * 4], %l2
277
        ldd     [%sp + 4 * 4], %l4
278
        ldd     [%sp + 6 * 4], %l6
279
 
280
        ldd     [%sp + 8 * 4], %i0
281
        ldd     [%sp + 10 * 4], %i2
282
        ldd     [%sp + 12 * 4], %i4
283
        ldd     [%sp + 14 * 4], %i6
284
        save                            ! Back to trap window
285
 
286
2:      ! restore the condition codes, PSR and PIL and return from trap.
287
        wr      %l0, %psr       ! restores flags, disables traps, and old PIL
288
#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW
289
        nop
290
        nop
291
        nop
292
#endif
293
        jmpl    %l1,  %g0
294
        rett    %l2
295
 
296
 
297
! end of vec_xvsr.S

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.