| 1 |
27 |
unneback |
#ifndef CYGONCE_HAL_XPIC_H
|
| 2 |
|
|
#define CYGONCE_HAL_XPIC_H
|
| 3 |
|
|
|
| 4 |
|
|
//=============================================================================
|
| 5 |
|
|
//
|
| 6 |
|
|
// hal_xpic.h
|
| 7 |
|
|
//
|
| 8 |
|
|
// HAL eXternal Programmable Interrupt Controller support
|
| 9 |
|
|
//
|
| 10 |
|
|
//=============================================================================
|
| 11 |
|
|
//####ECOSGPLCOPYRIGHTBEGIN####
|
| 12 |
|
|
// -------------------------------------------
|
| 13 |
|
|
// This file is part of eCos, the Embedded Configurable Operating System.
|
| 14 |
|
|
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
|
| 15 |
|
|
//
|
| 16 |
|
|
// eCos is free software; you can redistribute it and/or modify it under
|
| 17 |
|
|
// the terms of the GNU General Public License as published by the Free
|
| 18 |
|
|
// Software Foundation; either version 2 or (at your option) any later version.
|
| 19 |
|
|
//
|
| 20 |
|
|
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
|
| 21 |
|
|
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
| 22 |
|
|
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
| 23 |
|
|
// for more details.
|
| 24 |
|
|
//
|
| 25 |
|
|
// You should have received a copy of the GNU General Public License along
|
| 26 |
|
|
// with eCos; if not, write to the Free Software Foundation, Inc.,
|
| 27 |
|
|
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
|
| 28 |
|
|
//
|
| 29 |
|
|
// As a special exception, if other files instantiate templates or use macros
|
| 30 |
|
|
// or inline functions from this file, or you compile this file and link it
|
| 31 |
|
|
// with other works to produce a work based on this file, this file does not
|
| 32 |
|
|
// by itself cause the resulting work to be covered by the GNU General Public
|
| 33 |
|
|
// License. However the source code for this file must still be made available
|
| 34 |
|
|
// in accordance with section (3) of the GNU General Public License.
|
| 35 |
|
|
//
|
| 36 |
|
|
// This exception does not invalidate any other reasons why a work based on
|
| 37 |
|
|
// this file might be covered by the GNU General Public License.
|
| 38 |
|
|
//
|
| 39 |
|
|
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
|
| 40 |
|
|
// at http://sources.redhat.com/ecos/ecos-license/
|
| 41 |
|
|
// -------------------------------------------
|
| 42 |
|
|
//####ECOSGPLCOPYRIGHTEND####
|
| 43 |
|
|
//=============================================================================
|
| 44 |
|
|
//#####DESCRIPTIONBEGIN####
|
| 45 |
|
|
//
|
| 46 |
|
|
// Author(s): nickg, gthomas, hmt
|
| 47 |
|
|
// Contributors: nickg, gthomas, hmt
|
| 48 |
|
|
// Date: 1999-01-28
|
| 49 |
|
|
// Purpose: Define Interrupt support
|
| 50 |
|
|
// Description: The macros defined here provide the HAL APIs for handling
|
| 51 |
|
|
// an external interrupt controller, and which interrupt is
|
| 52 |
|
|
// used for what.
|
| 53 |
|
|
//
|
| 54 |
|
|
// Usage:
|
| 55 |
|
|
// #include <cyg/hal/hal_intr.h> // which includes this file
|
| 56 |
|
|
// ...
|
| 57 |
|
|
//
|
| 58 |
|
|
//
|
| 59 |
|
|
//####DESCRIPTIONEND####
|
| 60 |
|
|
//
|
| 61 |
|
|
//=============================================================================
|
| 62 |
|
|
|
| 63 |
|
|
#include <cyg/hal/hal_io.h>
|
| 64 |
|
|
|
| 65 |
|
|
//-----------------------------------------------------------------------------
|
| 66 |
|
|
// Interrupt controller access
|
| 67 |
|
|
|
| 68 |
|
|
// in erc32 simulator:
|
| 69 |
|
|
// 4 = UART A
|
| 70 |
|
|
// 5 = UART B
|
| 71 |
|
|
// 7 = UART error
|
| 72 |
|
|
// 12 = GPT (general purpose timer)
|
| 73 |
|
|
// 13 = RTC (realtime clock)
|
| 74 |
|
|
// 15 = watchdog
|
| 75 |
|
|
|
| 76 |
|
|
// The vector used by the Real time clock
|
| 77 |
|
|
#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_13
|
| 78 |
|
|
|
| 79 |
|
|
|
| 80 |
|
|
/* These must be accessed word-wide to work! */
|
| 81 |
|
|
#define SPARC_MEC_INTCON (0x01f80000)
|
| 82 |
|
|
|
| 83 |
|
|
#define SPARC_MEC_INTCON_PENDING (SPARC_MEC_INTCON + 0x48)
|
| 84 |
|
|
#define SPARC_MEC_INTCON_MASK (SPARC_MEC_INTCON + 0x4c)
|
| 85 |
|
|
#define SPARC_MEC_INTCON_CLEAR (SPARC_MEC_INTCON + 0x50)
|
| 86 |
|
|
#define SPARC_MEC_INTCON_FORCE (SPARC_MEC_INTCON + 0x54)
|
| 87 |
|
|
|
| 88 |
|
|
|
| 89 |
|
|
#define HAL_INTERRUPT_MASK( _vector_ ) CYG_MACRO_START \
|
| 90 |
|
|
cyg_uint32 _traps_, _mask_; \
|
| 91 |
|
|
HAL_DISABLE_TRAPS( _traps_ ); \
|
| 92 |
|
|
HAL_READ_UINT32( SPARC_MEC_INTCON_MASK, _mask_ ); \
|
| 93 |
|
|
_mask_ |= ( 1 << (_vector_) ); \
|
| 94 |
|
|
HAL_WRITE_UINT32(SPARC_MEC_INTCON_MASK, _mask_ ); \
|
| 95 |
|
|
HAL_RESTORE_INTERRUPTS( _traps_ ); \
|
| 96 |
|
|
CYG_MACRO_END
|
| 97 |
|
|
|
| 98 |
|
|
#define HAL_INTERRUPT_UNMASK( _vector_ ) CYG_MACRO_START \
|
| 99 |
|
|
cyg_uint32 _traps_, _mask_; \
|
| 100 |
|
|
HAL_DISABLE_TRAPS( _traps_ ); \
|
| 101 |
|
|
HAL_READ_UINT32( SPARC_MEC_INTCON_MASK, _mask_ ); \
|
| 102 |
|
|
_mask_ &=~ ( 1 << (_vector_) ); \
|
| 103 |
|
|
HAL_WRITE_UINT32( SPARC_MEC_INTCON_MASK, _mask_ ); \
|
| 104 |
|
|
HAL_RESTORE_INTERRUPTS( _traps_ ); \
|
| 105 |
|
|
CYG_MACRO_END
|
| 106 |
|
|
|
| 107 |
|
|
#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) CYG_MACRO_START \
|
| 108 |
|
|
cyg_uint32 _traps_; \
|
| 109 |
|
|
HAL_DISABLE_TRAPS( _traps_ ); \
|
| 110 |
|
|
HAL_WRITE_UINT32( SPARC_MEC_INTCON_CLEAR, ( 1 << (_vector_) ) ); \
|
| 111 |
|
|
HAL_RESTORE_INTERRUPTS( _traps_ ); \
|
| 112 |
|
|
CYG_MACRO_END
|
| 113 |
|
|
|
| 114 |
|
|
#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) /* nothing */
|
| 115 |
|
|
|
| 116 |
|
|
#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) /* nothing */
|
| 117 |
|
|
|
| 118 |
|
|
//-----------------------------------------------------------------------------
|
| 119 |
|
|
#endif // ifndef CYGONCE_HAL_XPIC_H
|
| 120 |
|
|
// End of hal_xpic.h
|
