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#ifndef CYGONCE_HAL_CACHE_H

#define CYGONCE_HAL_CACHE_H

//=============================================================================

//

//      hal_cache.h

//

//      HAL Cache control support (such as it is in the simulator)

//

//=============================================================================

//####ECOSGPLCOPYRIGHTBEGIN####

// -------------------------------------------

// This file is part of eCos, the Embedded Configurable Operating System.

// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.

//

// eCos is free software; you can redistribute it and/or modify it under

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//

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// for more details.

//

// You should have received a copy of the GNU General Public License along

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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.

//

// As a special exception, if other files instantiate templates or use macros

// or inline functions from this file, or you compile this file and link it

// with other works to produce a work based on this file, this file does not

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//

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// -------------------------------------------

//####ECOSGPLCOPYRIGHTEND####

//=============================================================================

//#####DESCRIPTIONBEGIN####

//

// Author(s):   nickg, gthomas, hmt

// Contributors:        nickg, gthomas, hmt

// Date:        1999-01-28

// Purpose:     Define Interrupt support

// Description: The macros defined here provide the HAL APIs for handling

//              the caches.

//              

// Usage:

//              #include <cyg/hal/hal_cache.h>

//              ...

//              

//

//####DESCRIPTIONEND####

//

//=============================================================================

#include <pkgconf/hal.h>

#include <pkgconf/hal_sparc.h>

#include <cyg/infra/cyg_type.h>

//-----------------------------------------------------------------------------

// LEON cache macros

//-----------------------------------------------------------------------------

// Cache dimensions

// Data cache

#define HAL_DCACHE_SIZE                 0x4000    // Size of data cache in bytes

#define HAL_DCACHE_LINE_SIZE            16        // Size of a data cache line

#define HAL_DCACHE_WAYS                 1        // Associativity of the cache

// Instruction cache

#define HAL_ICACHE_SIZE                 0x4000    // Size of cache in bytes

#define HAL_ICACHE_LINE_SIZE            16        // Size of a cache line

#define HAL_ICACHE_WAYS                 1        // Associativity of the cache

#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS))

#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS))

//-----------------------------------------------------------------------------

// Global control of data cache

// Enable the data cache

#define HAL_DCACHE_ENABLE()  //*((int *)0x80000014) |= (int)0x0000000c

// Disable the data cache

#define HAL_DCACHE_DISABLE()    //*((int *)0x80000014) &= ~(int)0x0000000c

// Invalidate the entire cache

#define HAL_DCACHE_INVALIDATE_ALL() //*((int *)0x80000014) |= (int)0x00400000

// Synchronize the contents of the cache with memory.

#define HAL_DCACHE_SYNC() 

// Set the data cache refill burst size

//#define HAL_DCACHE_BURST_SIZE(_size_)

// Set the data cache write mode

//#define HAL_DCACHE_WRITE_MODE( _mode_ )

//#define HAL_DCACHE_WRITETHRU_MODE       0

//#define HAL_DCACHE_WRITEBACK_MODE       1

// Load the contents of the given address range into the data cache

// and then lock the cache so that it stays there.

//#define HAL_DCACHE_LOCK(_base_, _size_)

// Undo a previous lock operation

//#define HAL_DCACHE_UNLOCK(_base_, _size_)

// Unlock entire cache

//#define HAL_DCACHE_UNLOCK_ALL()

//-----------------------------------------------------------------------------

// Data cache line control

// Allocate cache lines for the given address range without reading its

// contents from memory.

//#define HAL_DCACHE_ALLOCATE( _base_ , _size_ )

// Write dirty cache lines to memory and invalidate the cache entries

// for the given address range.

//#define HAL_DCACHE_FLUSH( _base_ , _size_ )

// Invalidate cache lines in the given range without writing to memory.

//#define HAL_DCACHE_INVALIDATE( _base_ , _size_ )

// Write dirty cache lines to memory for the given address range.

//#define HAL_DCACHE_STORE( _base_ , _size_ )

// Preread the given range into the cache with the intention of reading

// from it later.

//#define HAL_DCACHE_READ_HINT( _base_ , _size_ )

// Preread the given range into the cache with the intention of writing

// to it later.

//#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ )

// Allocate and zero the cache lines associated with the given range.

//#define HAL_DCACHE_ZERO( _base_ , _size_ )

//-----------------------------------------------------------------------------

// Global control of Instruction cache - use Data cache controls since they

// are not separatable.

// Enable the instruction cache

#define HAL_ICACHE_ENABLE()      HAL_DCACHE_ENABLE()

// Disable the instruction cache

#define HAL_ICACHE_DISABLE()     HAL_DCACHE_DISABLE()

// Invalidate the entire cache

#define HAL_ICACHE_INVALIDATE_ALL()  HAL_DCACHE_SYNC();  HAL_DCACHE_INVALIDATE_ALL()

// Synchronize the contents of the cache with memory.

#define HAL_ICACHE_SYNC()

// Set the instruction cache refill burst size

//#define HAL_ICACHE_BURST_SIZE(_size_)

// Load the contents of the given address range into the instruction cache

// and then lock the cache so that it stays there.

//#define HAL_ICACHE_LOCK(_base_, _size_)

// Undo a previous lock operation

//#define HAL_ICACHE_UNLOCK(_base_, _size_)

// Unlock entire cache

//#define HAL_ICACHE_UNLOCK_ALL()

//-----------------------------------------------------------------------------

// Instruction cache line control

// Invalidate cache lines in the given range without writing to memory.

//#define HAL_ICACHE_INVALIDATE( _base_ , _size_ )

//-----------------------------------------------------------------------------

#endif // ifndef CYGONCE_HAL_CACHE_H

// End of hal_cache.h