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#ifndef CYGONCE_HAL_HALBOOT_SI /* -*-asm-*- */
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#define CYGONCE_HAL_HALBOOT_SI
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// ====================================================================
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//
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// /halboot.si
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//
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// HAL bootup platform-oriented code (assembler)
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//
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// ====================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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// ====================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): hmt
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// Contributors: hmt
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// Date: 1999-02-01
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// Purpose: Bootup code, platform oriented.
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// Description:
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//
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//####DESCRIPTIONEND####
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//
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// ====================================================================
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// External Platform Initial Setup
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//
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// This should set up RAM and caches, and calm down any external
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// interrupt sources.
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//
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// It is just plain included in vectors.S
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//
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// RAM has not yet been touched at all; in fact all you have is a
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// register window selected.
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! Empty macro for debugging vectors.S
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.macro led val
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.endm
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! Set memory according to simulator config
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set 0x80000000, %l0 ! LEON register base address
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ld [%l0 + 0x14], %l1 ! chech if we have been initialized
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andcc %l1, 0x1, %g0
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bne 4f
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nop
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flush ! if we are here, we are running on
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set 0x1000f, %l1 ! the simulator....
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st %l1, [%l0 + 0x14] ! enable caches
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st %g0, [%l0 + 0x1c] ! clear LEON registers
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st %g0, [%l0 + 0x20] !
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st %g0, [%l0 + 0x90] !
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st %g0, [%l0 + 0x94] !
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st %g0, [%l0 + 0x98] !
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st %g0, [%l0 + 0x9C] !
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st %g0, [%l0 + 0xA0] !
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st %g0, [%l0 + 0xA4] !
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st %g0, [%l0 + 0xA4] !
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st %g0, [%l0 + 0x78] !
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st %g0, [%l0 + 0x88] !
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ld [%l0 + 0xF8], %g1 ! load simulator rom size
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clr %l2
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subcc %g1, 0, %g0
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be 3f
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srl %g1, 13, %g1 ! calculate appropriate rom size
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1:
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srl %g1, 1, %g1
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tst %g1
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bne,a 1b
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inc %l2
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sll %l2, 14, %l2
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st %l2, [%l0 + 0x00] ! set prom size in memcfg1
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set 0, %l2
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ld [%l0 + 0xF4], %g2 ! load simulator ram size
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srl %g2, 13, %g1 ! calculate appropriate ram size
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1:
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srl %g1, 1, %g1
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tst %g1
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bne,a 1b
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inc %l2
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sll %l2, 9, %l2
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or %l2, 0x20, %l2
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st %l2, [%l0 + 0x04] ! set ram size in memcfg2
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set 0x40000000, %l2
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add %g2, %l2, %fp
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sub %fp, 96*4, %sp
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3:
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st %g0, [%sp] !probe for FPU
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! ld [%sp], %fsr
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set 49, %l1
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st %l1, [%l0 + 0x64] ! scaler = 49
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st %l1, [%l0 + 0x60] ! scaler = 49
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2:
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set -1, %l1
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st %l1, [%l0 + 0x44] ! timer 1 = 0xffffff
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set 7, %l1
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st %l1, [%l0 + 0x48] ! start timer 1
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st %l1, [%l0 + 0x78] ! enable UARTS
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st %l1, [%l0 + 0x88]
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4:
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! then copy the branch instructions into the vector
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rd %tbr, %g1
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andn %g1, 0xfff, %g1 ! clear non-address bits
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sethi %hi(real_vector_instructions), %l0
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or %l0, %lo(real_vector_instructions), %l0
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ld [ %l0 ], %l1
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st %l1, [ %g1 ] ! into the vector
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ld [ %l0 + 4 ], %l1
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st %l1, [ %g1 + 4 ] ! into the vector
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#endif /* CYGONCE_HAL_HALBOOT_SI */
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/* EOF halboot.si */
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