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/*===========================================================================
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//
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// vec_ivsr.S
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//
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// SPARClite vectors: interrupt vector service routine
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//
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//===========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//===========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): hmt
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// Contributors: hmt
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// Date: 1999-02-20
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// Purpose: SPARClite vector code
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// Description: see vectors.S; this is the default vector service routine
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// for interrupts.
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//
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//####DESCRIPTIONEND####
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//
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//=========================================================================*/
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!----------------------------------------------------------------------------
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// .file "vec_ivsr.S"
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!----------------------------------------------------------------------------
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#include
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#include
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#ifdef CYGPKG_KERNEL
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# include
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#else
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# undef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
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# undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
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#endif
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!------------------------------------------------------------------------
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#include
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#define DELAYS_AFTER_WRPSR_SAME_WINDOW
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#define DELAYS_AFTER_WRWIM
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! Macro to mark the stack as we descend, for debugging, because it is likely
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! that actually running the ISR won~t touch the stack, but the memory needs
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! to be there. Normally blank.
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//#define MARKSTACKUSED st %sp, [ %sp ]
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#define MARKSTACKUSED
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!------------------------------------------------------------------------
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.text
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!---------------------------------------------------------------------------
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! default interrupt VSR, which calls the appropriate ISR after scheduler
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! lock and interrupt masking, then interrupt_end(). interrupt_end() must be
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! called with interrupts enabled, on the original thread stack (no separate
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! interrupt stack) or with interrupts masked, on the original stack (when
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! separate interrupt stack is supported).
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.global hal_default_interrupt_vsr
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hal_default_interrupt_vsr:
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! here,locals have been set up as follows:
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! %l0 = psr (with this CWP/window-level in it)
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! %l1 = pc
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! %l2 = npc
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! %l3 = vector number (1-15 for interrupts)
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! and we are in our own register window, though it is likely that
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! the next one will need to be saved before we can use it:
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! ie. this one is the invalid register window.
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! must establish a safe stack before re-enabling interrupts + traps
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and %l0, __WINBITS, %l7 ! CWP extracted
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! no inc/dec here, so no need for special measures for not-8-windows
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mov 1, %l6
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sll %l6, %l7, %l6 ! 1 << CWP
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rd %wim, %l5
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cmp %l5, %l6 ! are they the same?
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bne 1f ! No, so the stack is OK as is.
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! now do by hand an overflow trap, effectively
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mov %g1, %l7 ! (DELAY SLOT)
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srl %l5, 1, %l5
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sll %l6, __WINSIZE-1, %l6
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or %l6, %l5, %g1 ! new WIM in %g1 so we can get it
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! within the save:
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save ! Slip into next window
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mov %g1, %wim ! Install the new wim
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! (invalidates current window!)
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#ifdef DELAYS_AFTER_WRWIM
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nop
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nop
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nop
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#endif
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std %l0, [%sp + 0 * 4] ! save L & I registers
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std %l2, [%sp + 2 * 4]
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std %l4, [%sp + 4 * 4]
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std %l6, [%sp + 6 * 4]
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std %i0, [%sp + 8 * 4]
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std %i2, [%sp + 10 * 4]
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std %i4, [%sp + 12 * 4]
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std %i6, [%sp + 14 * 4]
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restore ! Go back to trap window.
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mov %l7, %g1 ! Restore %g1
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1: ! now save away the regs we must preserve
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sub %fp, 32 * 4, %sp
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#ifdef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
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std %g0, [%sp + 16 * 4] ! save G registers
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std %g2, [%sp + 18 * 4] ! (set %g0 place to 0 to flag special context)
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std %g4, [%sp + 20 * 4]
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std %g6, [%sp + 22 * 4]
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#else // not CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
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std %l0, [%sp + 0 * 4] ! save L & I registers
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std %l2, [%sp + 2 * 4]
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std %l4, [%sp + 4 * 4]
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std %l6, [%sp + 6 * 4]
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std %i0, [%sp + 8 * 4]
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std %i2, [%sp + 10 * 4]
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std %i4, [%sp + 12 * 4]
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std %i6, [%sp + 14 * 4]
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st %g1, [%sp + 17 * 4] ! save G registers
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std %g2, [%sp + 18 * 4]
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std %g4, [%sp + 20 * 4]
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std %g6, [%sp + 22 * 4]
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! no point whatsoever in saving O registers
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! and save the CWP in %g0 save place
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st %l0, [%sp + 16 * 4]
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#endif // ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
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sub %sp, 24 * 4, %sp ! fresh frame including
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! arg spill area for callees
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MARKSTACKUSED ! kilroy was here
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#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
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! we will switch to the interrupt stack unless already running on it
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.extern cyg_interrupt_stack
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.extern cyg_interrupt_stack_base
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set cyg_interrupt_stack, %g1
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set cyg_interrupt_stack_base, %g2
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cmp %sp, %g2 ! below base?
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blu 1f ! if so, switch.
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cmp %sp, %g1 ! below top? (DELAY SLOT)
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blu 2f ! if so, DON~T switch.
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nop ! (DELAY SLOT)
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1: ! switch to the interrupt stack
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st %sp, [ %g1 ] ! there is spare above stack
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sub %g1, 24 * 4, %sp ! fresh frame including
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! arg spill area for callees
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MARKSTACKUSED ! kilroy was here
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2:
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! continue as before, already in the interrupt stack.
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#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
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#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
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! Lock the scheduler
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.extern SCHED_LOCK_MANGLED_NAME
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sethi %hi(SCHED_LOCK_MANGLED_NAME), %l7
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ld [ %l7 + %lo(SCHED_LOCK_MANGLED_NAME) ], %l6
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add %l6, 1, %l6
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st %l6, [ %l7 + %lo(SCHED_LOCK_MANGLED_NAME) ]
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#endif
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! HELP_GDB_WITH_BACKTRACE
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mov %i7, %l5 ! preserve it in l5
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mov %l1, %i7 ! bogus return link here
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! and we must preserve the Y register (multiply/divide auxiliary)
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! over these calls; we will keep it in %l4 which is otherwise unused.
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rd %y, %l4
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! Now we can reenable traps and mask off only lower prio interrupts:
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andn %l0, 0xf00, %l7 ! clear PIL field
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or %l7, 0x0e0, %l7 ! and ET (+S,PS)
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sll %l3, 8, %l6 ! trap number (1-15) into PIL bitfield
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wr %l7, %l6, %psr ! and enable!
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#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW
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nop
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nop
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nop
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#endif
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! now call the ISR and so on with the appropriate args:
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! ie.
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! isr_retcode = (*(hal_interrupt_handlers[ vector ]))
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! ( vector, hal_interrupt_data[ vector ] );
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! from hal_arch.h
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!// ISR tables
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!CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];
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!CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];
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!CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];
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mov %l3, %o0
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sll %l3, 2, %l3 ! %l3 to a word offset
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sethi %hi(hal_interrupt_data), %l7
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or %l7, %lo(hal_interrupt_data), %l7
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ld [ %l7 + %l3 ], %o1
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sethi %hi(hal_interrupt_handlers), %l7
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or %l7, %lo(hal_interrupt_handlers), %l7
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ld [ %l7 + %l3 ], %l6
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call %l6
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nop
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#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
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! We only need to call _interrupt_end() when there is a kernel
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! present to do any tidying up.
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250 |
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#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
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! now we switch back to the user stack (if we~re at the top
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! of the interrupt stack).
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254 |
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or %l0, 0xfe0, %l7
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256 |
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wr %l7, %psr ! Interrupts all masked, ET
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#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW
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258 |
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nop
|
259 |
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nop
|
260 |
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nop
|
261 |
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#endif
|
262 |
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263 |
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.extern cyg_interrupt_stack
|
264 |
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set cyg_interrupt_stack - (24 * 4), %g1
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265 |
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|
266 |
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cmp %sp, %g1 ! is SP less?
|
267 |
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blu 1f ! if so, do not change back
|
268 |
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nop
|
269 |
|
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! switch to the thread stack
|
270 |
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ld [ %g1 + (24 * 4) ], %sp ! there is spare above stack
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271 |
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1:
|
272 |
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|
273 |
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#else // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
|
274 |
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! First restore the processor interrupt level to that interrupted
|
275 |
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! (otherwise a task-switch runs at the current PIL) on the assumption
|
276 |
|
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! that the ISR dealt with the interrupt source per se, so it is safe
|
277 |
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! to unmask it, effectively:
|
278 |
|
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or %l0, 0x0e0, %l7 ! original PSR and ET (+S,PS)
|
279 |
|
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wr %l7, %psr ! and enable!
|
280 |
|
|
#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW
|
281 |
|
|
nop
|
282 |
|
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nop
|
283 |
|
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nop
|
284 |
|
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#endif
|
285 |
|
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#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
|
286 |
|
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|
287 |
|
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! then call interrupt_end( isr_retcode, &intr_object, ®save )
|
288 |
|
|
! to unlock the scheduler and do any rescheduling that~s needed.
|
289 |
|
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! argument 0 (isr_retcode) is already in place in %o0
|
290 |
|
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sethi %hi(hal_interrupt_objects), %l7
|
291 |
|
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or %l7, %lo(hal_interrupt_objects), %l7
|
292 |
|
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ld [ %l7 + %l3 ], %o1
|
293 |
|
|
add %sp, 24 * 4, %o2 ! saved regset (maybe tiny)
|
294 |
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|
295 |
|
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.extern interrupt_end
|
296 |
|
|
call interrupt_end
|
297 |
|
|
nop
|
298 |
|
|
#endif
|
299 |
|
|
|
300 |
|
|
! restore the Y register having done our callouts to C
|
301 |
|
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wr %l4, %y
|
302 |
|
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|
303 |
|
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! We can reinstall the original CWP here; even if interrupt_end()
|
304 |
|
|
! performed a reschedule (ie. yield/resume pair) we will be in the
|
305 |
|
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! same window. The window is preserved by reschedule precisely
|
306 |
|
|
! because it is impossible atomically to disable traps here without
|
307 |
|
|
! involving a CWP living in a register for a time when other
|
308 |
|
|
! interrupts may occur.
|
309 |
|
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|
310 |
|
|
! disable traps (using the saved psr is fastest way)
|
311 |
|
|
wr %l0, %psr ! restores flags, disables traps, and old PIL
|
312 |
|
|
#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW
|
313 |
|
|
nop
|
314 |
|
|
nop
|
315 |
|
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nop
|
316 |
|
|
#endif
|
317 |
|
|
|
318 |
|
|
! HELP_GDB_WITH_BACKTRACE
|
319 |
|
|
mov %l5, %i7 ! restore (unused) return link
|
320 |
|
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|
321 |
|
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! and restore other saved regs
|
322 |
|
|
! (see CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT)
|
323 |
|
|
add %sp, 24 * 4, %sp ! undo fresh frame
|
324 |
|
|
|
325 |
|
|
ld [%sp + 17 * 4], %g1 ! restore G registers
|
326 |
|
|
ldd [%sp + 18 * 4], %g2
|
327 |
|
|
ldd [%sp + 20 * 4], %g4
|
328 |
|
|
ldd [%sp + 22 * 4], %g6
|
329 |
|
|
|
330 |
|
|
! and do NOT restore any other registers L, I or O
|
331 |
|
|
|
332 |
|
|
! Now test for window underflow here and fix up if needs be.
|
333 |
|
|
!
|
334 |
|
|
! Why? interrupt_end() might have yielded us, when only
|
335 |
|
|
! its own frame was restored; its own return to us caused a
|
336 |
|
|
! window underflow trap, as would our return to interruptee
|
337 |
|
|
! unless we deal with it now.
|
338 |
|
|
|
339 |
|
|
add %l0, 1, %l7 ! interruptee~s CWP plus noise
|
340 |
|
|
and %l7, __WINBITS, %l7 ! CWP only
|
341 |
|
|
#if 8 == __WINSIZE
|
342 |
|
|
! it is in range already
|
343 |
|
|
#else // expect 5 or 6 or 7 windows
|
344 |
|
|
cmp %l7, __WINSIZE
|
345 |
|
|
bge,a 567f ! taken: do delay slot, handle overflow
|
346 |
|
|
mov 0, %l7 ! only if .ge. above
|
347 |
|
|
567:
|
348 |
|
|
#endif
|
349 |
|
|
mov 1, %l6
|
350 |
|
|
sll %l6, %l7, %l6 ! 1 << CWP
|
351 |
|
|
rd %wim, %l5
|
352 |
|
|
cmp %l5, %l6 ! are they the same?
|
353 |
|
|
bne 2f ! No, so the stack is OK as is.
|
354 |
|
|
|
355 |
|
|
! now do by hand an underflow trap, effectively
|
356 |
|
|
sll %l5, 1, %l5 ! Rotate wim left
|
357 |
|
|
srl %l6, __WINSIZE-1, %l6
|
358 |
|
|
wr %l5, %l6, %wim
|
359 |
|
|
#ifdef DELAYS_AFTER_WRWIM
|
360 |
|
|
nop ! are these delays needed?
|
361 |
|
|
nop ! (following restore uses wim)
|
362 |
|
|
nop
|
363 |
|
|
#endif
|
364 |
|
|
restore ! Interruptee~s window
|
365 |
|
|
ldd [%sp + 0 * 4], %l0 ! restore L & I registers
|
366 |
|
|
ldd [%sp + 2 * 4], %l2
|
367 |
|
|
ldd [%sp + 4 * 4], %l4
|
368 |
|
|
ldd [%sp + 6 * 4], %l6
|
369 |
|
|
|
370 |
|
|
ldd [%sp + 8 * 4], %i0
|
371 |
|
|
ldd [%sp + 10 * 4], %i2
|
372 |
|
|
ldd [%sp + 12 * 4], %i4
|
373 |
|
|
ldd [%sp + 14 * 4], %i6
|
374 |
|
|
save ! Back to trap window
|
375 |
|
|
|
376 |
|
|
2: ! restore the condition codes, PSR and PIL and return from trap.
|
377 |
|
|
wr %l0, %psr ! restores flags, disables traps, and old PIL
|
378 |
|
|
#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW
|
379 |
|
|
nop
|
380 |
|
|
nop
|
381 |
|
|
nop
|
382 |
|
|
#endif
|
383 |
|
|
jmpl %l1, %g0
|
384 |
|
|
rett %l2
|
385 |
|
|
|
386 |
|
|
!----------------------------------------------------------------------------
|
387 |
|
|
|
388 |
|
|
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
|
389 |
|
|
|
390 |
|
|
! This routine can only be called from a thread stack, maybe
|
391 |
|
|
! with interrupts (but not traps) disabled.
|
392 |
|
|
! It switches to the interrupt stack then calls back to the
|
393 |
|
|
! kernel to execute DSRs.
|
394 |
|
|
|
395 |
|
|
.global hal_interrupt_stack_call_pending_DSRs
|
396 |
|
|
hal_interrupt_stack_call_pending_DSRs:
|
397 |
|
|
save %sp, -24 * 4, %sp
|
398 |
|
|
|
399 |
|
|
MARKSTACKUSED ! kilroy was here
|
400 |
|
|
|
401 |
|
|
! be atomic
|
402 |
|
|
rd %psr, %l0
|
403 |
|
|
andn %l0, 0x20, %l1 ! clear ET to disable traps
|
404 |
|
|
wr %l1, %psr ! into the PSR
|
405 |
|
|
nop
|
406 |
|
|
nop
|
407 |
|
|
nop
|
408 |
|
|
|
409 |
|
|
mov %sp, %l7 ! save calling stack location
|
410 |
|
|
|
411 |
|
|
! now switch stack to the interrupt stack, plus some headroom
|
412 |
|
|
! for saving a register set if we are interrupted
|
413 |
|
|
.extern cyg_interrupt_stack
|
414 |
|
|
set cyg_interrupt_stack - 4 * 24, %sp
|
415 |
|
|
|
416 |
|
|
MARKSTACKUSED ! kilroy was here
|
417 |
|
|
|
418 |
|
|
! and enable interrupts unconditionally to call the DSRs
|
419 |
|
|
or %l0, 0x0e0, %l2 ! set ET, S, PS
|
420 |
|
|
andn %l2, 0xf00, %l2 ! PIL to zero
|
421 |
|
|
wr %l2, %psr ! into the PSR
|
422 |
|
|
nop
|
423 |
|
|
nop
|
424 |
|
|
nop
|
425 |
|
|
|
426 |
|
|
.extern cyg_interrupt_call_pending_DSRs
|
427 |
|
|
call cyg_interrupt_call_pending_DSRs
|
428 |
|
|
nop
|
429 |
|
|
|
430 |
|
|
mov %l7, %sp ! restore calling stack
|
431 |
|
|
|
432 |
|
|
wr %l0, %psr ! restore interrupt status
|
433 |
|
|
nop
|
434 |
|
|
nop
|
435 |
|
|
nop
|
436 |
|
|
|
437 |
|
|
ret
|
438 |
|
|
restore
|
439 |
|
|
#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
|
440 |
|
|
|
441 |
|
|
!----------------------------------------------------------------------------
|
442 |
|
|
|
443 |
|
|
! end of vec_ivsr.S
|