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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [v85x/] [v850/] [v2_0/] [include/] [v850_common.h] - Blame information for rev 174

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#ifndef CYGONCE_V850_COMMON_H
2
#define CYGONCE_V850_COMMON_H
3
 
4
/*=============================================================================
5
//
6
//      v850_common.h
7
//
8
//      NEC/V850 common definitions
9
//
10
//=============================================================================
11
//####ECOSGPLCOPYRIGHTBEGIN####
12
// -------------------------------------------
13
// This file is part of eCos, the Embedded Configurable Operating System.
14
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
15
//
16
// eCos is free software; you can redistribute it and/or modify it under
17
// the terms of the GNU General Public License as published by the Free
18
// Software Foundation; either version 2 or (at your option) any later version.
19
//
20
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
21
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
22
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
23
// for more details.
24
//
25
// You should have received a copy of the GNU General Public License along
26
// with eCos; if not, write to the Free Software Foundation, Inc.,
27
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28
//
29
// As a special exception, if other files instantiate templates or use macros
30
// or inline functions from this file, or you compile this file and link it
31
// with other works to produce a work based on this file, this file does not
32
// by itself cause the resulting work to be covered by the GNU General Public
33
// License. However the source code for this file must still be made available
34
// in accordance with section (3) of the GNU General Public License.
35
//
36
// This exception does not invalidate any other reasons why a work based on
37
// this file might be covered by the GNU General Public License.
38
//
39
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
40
// at http://sources.redhat.com/ecos/ecos-license/
41
// -------------------------------------------
42
//####ECOSGPLCOPYRIGHTEND####
43
//=============================================================================
44
//#####DESCRIPTIONBEGIN####
45
//
46
// Author(s):    gthomas, jlarmour
47
// Contributors: gthomas, jlarmour
48
// Date:         2000-03-10
49
// Purpose:      NEC/V850 CPU family hardware description
50
// Description:
51
// Usage:        #include <cyg/hal/v850_common.h>
52
//
53
//####DESCRIPTIONEND####
54
//
55
//===========================================================================*/
56
 
57
// Note: these defintions match the documentation, thus no attempt is made
58
// to sanitise (mangle) the names.  Also, care should be taken to keep this
59
// clean for use in assembly code (no "C" constructs).
60
 
61
#include <pkgconf/hal.h>
62
 
63
// These definitions are for the NEC V850/SA1 (70301x)
64
 
65
#if CYGINT_HAL_V850_VARIANT_SA1
66
 
67
#define V850_REGS         0xFFFFF000
68
 
69
#define V850_REG_P0       0xFFFFF000
70
#define V850_REG_P1       0xFFFFF002
71
#define V850_REG_P2       0xFFFFF004
72
#define V850_REG_P3       0xFFFFF006
73
#define V850_REG_P4       0xFFFFF008
74
#define V850_REG_P5       0xFFFFF00A
75
#define V850_REG_P6       0xFFFFF00C
76
#define V850_REG_P7       0xFFFFF00E
77
#define V850_REG_P8       0xFFFFF010
78
#define V850_REG_P9       0xFFFFF012
79
#define V850_REG_P10      0xFFFFF014
80
#define V850_REG_P11      0xFFFFF016
81
#define V850_REG_P12      0xFFFFF018
82
 
83
#define V850_REG_PM0      0xFFFFF020
84
#define V850_REG_PM1      0xFFFFF022
85
#define V850_REG_PM2      0xFFFFF024
86
#define V850_REG_PM3      0xFFFFF026
87
#define V850_REG_PM4      0xFFFFF028
88
#define V850_REG_PM5      0xFFFFF02A
89
#define V850_REG_PM6      0xFFFFF02C
90
#define V850_REG_PM9      0xFFFFF032
91
#define V850_REG_PM10     0xFFFFF034
92
#define V850_REG_PM11     0xFFFFF036
93
#define V850_REG_PM12     0xFFFFF038
94
 
95
#define V850_REG_MM       0xFFFFF04C
96
 
97
#define V850_REG_PMC12    0xFFFFF058
98
 
99
#define V850_REG_DWC      0xFFFFF060
100
#define V850_REG_BCC      0xFFFFF062
101
#define V850_REG_SYC      0xFFFFF064
102
#define V850_REG_MAM      0xFFFFF068
103
 
104
#define V850_REG_PSC      0xFFFFF070
105
#define V850_REG_PCC      0xFFFFF074
106
#define V850_REG_SYS      0xFFFFF078
107
 
108
#define V850_REG_PU0      0xFFFFF080
109
#define V850_REG_PU1      0xFFFFF082
110
#define V850_REG_PU2      0xFFFFF084
111
#define V850_REG_PU3      0xFFFFF086
112
#define V850_REG_PU10     0xFFFFF094
113
#define V850_REG_PU11     0xFFFFF096
114
 
115
#define V850_REG_PF1      0xFFFFF0A2
116
#define V850_REG_PF2      0xFFFFF0A4
117
#define V850_REG_PF10     0xFFFFF0B4
118
 
119
#define V850_REG_EGP0     0xFFFFF0C0
120
#define V850_REG_EGN0     0xFFFFF0C2
121
 
122
#define V850_REG_WDTIC    0xFFFFF100
123
#define V850_REG_PIC0     0xFFFFF102
124
#define V850_REG_PIC1     0xFFFFF104
125
#define V850_REG_PIC2     0xFFFFF106
126
#define V850_REG_PIC3     0xFFFFF108
127
#define V850_REG_PIC4     0xFFFFF10A
128
#define V850_REG_PIC5     0xFFFFF10C
129
#define V850_REG_PIC6     0xFFFFF10E
130
#define V850_REG_WTIIC    0xFFFFF110
131
#define V850_REG_WTNIIC   0xFFFFF110
132
#define V850_REG_TMIC00   0xFFFFF112
133
#define V850_REG_TMIC01   0xFFFFF114
134
#define V850_REG_TMIC10   0xFFFFF116
135
#define V850_REG_TMIC11   0xFFFFF118
136
#define V850_REG_TMIC2    0xFFFFF11A
137
#define V850_REG_TMIC3    0xFFFFF11C
138
#define V850_REG_TMIC4    0xFFFFF11E
139
#define V850_REG_TMIC5    0xFFFFF120
140
#define V850_REG_CSIC0    0xFFFFF122
141
#define V850_REG_SERIC0   0xFFFFF124
142
#define V850_REG_CSIC1    0xFFFFF126
143
#define V850_REG_SRIC0    0xFFFFF126
144
#define V850_REG_STIC0    0xFFFFF128
145
#define V850_REG_CSIC2    0xFFFFF12A
146
#define V850_REG_SRIC2    0xFFFFF12A
147
#define V850_REG_SERIC1   0xFFFFF12C
148
#define V850_REG_SRIC1    0xFFFFF12E
149
#define V850_REG_STIC1    0xFFFFF130
150
#define V850_REG_ADIC     0xFFFFF132
151
#define V850_REG_DMAIC0   0xFFFFF134
152
#define V850_REG_DMAIC1   0xFFFFF136
153
#define V850_REG_DMAIC2   0xFFFFF138
154
#define V850_REG_WTIC     0xFFFFF13A
155
#define V850_REG_WTNIC    0xFFFFF13A
156
 
157
#define V850_REG_ISPR     0xFFFFF166
158
#define V850_REG_PRCMD    0xFFFFF170
159
 
160
#define V850_REG_DIOA0    0xFFFFF180
161
#define V850_REG_DRA0     0xFFFFF182
162
#define V850_REG_DBC0     0xFFFFF184
163
#define V850_REG_DCHC0    0xFFFFF186
164
 
165
#define V850_REG_DIOA1    0xFFFFF190
166
#define V850_REG_DRA1     0xFFFFF192
167
#define V850_REG_DBC1     0xFFFFF194
168
#define V850_REG_DCHC1    0xFFFFF196
169
 
170
#define V850_REG_DIOA2    0xFFFFF1A0
171
#define V850_REG_DRA2     0xFFFFF1A2
172
#define V850_REG_DBC2     0xFFFFF1A4
173
#define V850_REG_DCHC2    0xFFFFF1A6
174
 
175
#define V850_REG_TM0      0xFFFFF200
176
#define V850_REG_CR00     0xFFFFF202
177
#define V850_REG_CR01     0xFFFFF204
178
#define V850_REG_PRM0     0xFFFFF206
179
#define V850_REG_PRM00    0xFFFFF206
180
#define V850_REG_TMC0     0xFFFFF208
181
#define V850_REG_CRC0     0xFFFFF20A
182
#define V850_REG_TOC0     0xFFFFF20C
183
#define V850_REG_PRM01    0xFFFFF20E
184
 
185
#define V850_REG_TM1      0xFFFFF210
186
#define V850_REG_CR10     0xFFFFF212
187
#define V850_REG_CR11     0xFFFFF214
188
#define V850_REG_PRM1     0xFFFFF216
189
#define V850_REG_PRM10    0xFFFFF216
190
#define V850_REG_TMC1     0xFFFFF218
191
#define V850_REG_CRC1     0xFFFFF21A
192
#define V850_REG_TOC1     0xFFFFF21C
193
#define V850_REG_PRM11    0xFFFFF21E
194
 
195
#define V850_REG_TM2      0xFFFFF240
196
#define V850_REG_CR20     0xFFFFF242
197
#define V850_REG_TCL2     0xFFFFF244
198
#define V850_REG_TMC2     0xFFFFF246
199
#define V850_REG_TM23     0xFFFFF24A
200
#define V850_REG_CR23     0xFFFFF24C
201
#define V850_REG_TCL21    0xFFFFF24E
202
 
203
#define V850_REG_TM3      0xFFFFF250
204
#define V850_REG_CR30     0xFFFFF252
205
#define V850_REG_TCL3     0xFFFFF254
206
#define V850_REG_TMC3     0xFFFFF256
207
#define V850_REG_TCL31    0xFFFFF25E
208
 
209
#define V850_REG_TM4      0xFFFFF260
210
#define V850_REG_CR40     0xFFFFF262
211
#define V850_REG_TCL4     0xFFFFF264
212
#define V850_REG_TMC4     0xFFFFF266
213
#define V850_REG_TM45     0xFFFFF26A
214
#define V850_REG_CR45     0xFFFFF26C
215
#define V850_REG_TCL41    0xFFFFF26E
216
 
217
#define V850_REG_TM5      0xFFFFF270
218
#define V850_REG_CR50     0xFFFFF272
219
#define V850_REG_TCL5     0xFFFFF274
220
#define V850_REG_TMC5     0xFFFFF276
221
#define V850_REG_TCL51    0xFFFFF27E
222
 
223
#define V850_REG_SIO0     0xFFFFF2A0
224
#define V850_REG_CSIM0    0xFFFFF2A2
225
#define V850_REG_CSIS0    0xFFFFF2A4
226
 
227
#define V850_REG_SIO1     0xFFFFF2B0
228
#define V850_REG_CSIM1    0xFFFFF2B2
229
#define V850_REG_CSIS1    0xFFFFF2B4
230
 
231
#define V850_REG_SIO2     0xFFFFF2C0
232
#define V850_REG_CSIM2    0xFFFFF2C2
233
#define V850_REG_CSIS2    0xFFFFF2C4
234
 
235
#define V850_REG_ASIM0    0xFFFFF300
236
#define V850_REG_ASIS0    0xFFFFF302
237
#define V850_REG_BRGC0    0xFFFFF304
238
#define V850_REG_TXS0     0xFFFFF306
239
#define V850_REG_RXB0     0xFFFFF308
240
#define V850_REG_BRGMC0   0xFFFFF30E
241
#define V850_REG_BRGMC00  0xFFFFF30E
242
 
243
#define V850_REG_ASIM1    0xFFFFF310
244
#define V850_REG_ASIS1    0xFFFFF312
245
#define V850_REG_BRGC1    0xFFFFF314
246
#define V850_REG_TXS1     0xFFFFF316
247
#define V850_REG_RXB1     0xFFFFF318
248
#define V850_REG_BRGMC1   0xFFFFF31E
249
#define V850_REG_BRGMC10  0xFFFFF31E
250
#define V850_REG_BRGMC01  0xFFFFF320
251
 
252
#define V850_REG_IICC0    0xFFFFF340
253
#define V850_REG_IICS0    0xFFFFF342
254
#define V850_REG_IICCL0   0xFFFFF344
255
#define V850_REG_SVA0     0xFFFFF346
256
#define V850_REG_IIC0     0xFFFFF348
257
#define V850_REG_IICX0    0xFFFFF34A
258
 
259
#define V850_REG_WTM      0xFFFFF360
260
#define V850_REG_OSTS     0xFFFFF380
261
#define V850_REG_WDCS     0xFFFFF382
262
#define V850_REG_WDTM     0xFFFFF384
263
 
264
#define V850_REG_RTBL     0xFFFFF3A0
265
#define V850_REG_RTBH     0xFFFFF3A2
266
#define V850_REG_RTPM     0xFFFFF3A4
267
#define V850_REG_RTPC     0xFFFFF3A6
268
 
269
#define V850_REG_ADM      0xFFFFF3C0
270
#define V850_REG_ADS      0xFFFFF3C2
271
#define V850_REG_ADCR     0xFFFFF3C4
272
#define V850_REG_ADCRH    0xFFFFF3C6
273
 
274
/*---------------------------------------------------------------------------*/
275
 
276
// These definitions are for the NEC V850/SB1 (70303x)
277
 
278
#elif CYGINT_HAL_V850_VARIANT_SB1
279
 
280
#define V850_REGS         0xFFFFF000
281
 
282
#define V850_REG_P0       0xFFFFF000
283
#define V850_REG_P1       0xFFFFF002
284
#define V850_REG_P2       0xFFFFF004
285
#define V850_REG_P3       0xFFFFF006
286
#define V850_REG_P4       0xFFFFF008
287
#define V850_REG_P5       0xFFFFF00A
288
#define V850_REG_P6       0xFFFFF00C
289
#define V850_REG_P7       0xFFFFF00E
290
#define V850_REG_P8       0xFFFFF010
291
#define V850_REG_P9       0xFFFFF012
292
#define V850_REG_P10      0xFFFFF014
293
#define V850_REG_P11      0xFFFFF016
294
 
295
#define V850_REG_PM0      0xFFFFF020
296
#define V850_REG_PM1      0xFFFFF022
297
#define V850_REG_PM2      0xFFFFF024
298
#define V850_REG_PM3      0xFFFFF026
299
#define V850_REG_PM4      0xFFFFF028
300
#define V850_REG_PM5      0xFFFFF02A
301
#define V850_REG_PM6      0xFFFFF02C
302
#define V850_REG_PM9      0xFFFFF032
303
#define V850_REG_PM10     0xFFFFF034
304
#define V850_REG_PM11     0xFFFFF036
305
 
306
#define V850_REG_PAC      0xFFFFF040
307
#define V850_REG_MM       0xFFFFF04C
308
 
309
#define V850_REG_DWC      0xFFFFF060
310
#define V850_REG_BCC      0xFFFFF062
311
#define V850_REG_SYC      0xFFFFF064
312
#define V850_REG_MAM      0xFFFFF068
313
 
314
#define V850_REG_PSC      0xFFFFF070
315
#define V850_REG_PCC      0xFFFFF074
316
#define V850_REG_SYS      0xFFFFF078
317
 
318
#define V850_REG_PU0      0xFFFFF080
319
#define V850_REG_PU1      0xFFFFF082
320
#define V850_REG_PU2      0xFFFFF084
321
#define V850_REG_PU3      0xFFFFF086
322
#define V850_REG_PU10     0xFFFFF094
323
#define V850_REG_PU11     0xFFFFF096
324
 
325
#define V850_REG_PF1      0xFFFFF0A2
326
#define V850_REG_PF2      0xFFFFF0A4
327
#define V850_REG_PF3      0xFFFFF0A6
328
#define V850_REG_PF10     0xFFFFF0B4
329
 
330
#define V850_REG_EGP0     0xFFFFF0C0
331
#define V850_REG_EGN0     0xFFFFF0C2
332
 
333
#define V850_REG_WDTIC    0xFFFFF100
334
#define V850_REG_PIC0     0xFFFFF102
335
#define V850_REG_PIC1     0xFFFFF104
336
#define V850_REG_PIC2     0xFFFFF106
337
#define V850_REG_PIC3     0xFFFFF108
338
#define V850_REG_PIC4     0xFFFFF10A
339
#define V850_REG_PIC5     0xFFFFF10C
340
#define V850_REG_PIC6     0xFFFFF10E
341
#define V850_REG_WTNIIC   0xFFFFF118
342
#define V850_REG_TMIC00   0xFFFFF11A
343
#define V850_REG_TMIC01   0xFFFFF11C
344
#define V850_REG_TMIC10   0xFFFFF11E
345
#define V850_REG_TMIC11   0xFFFFF120
346
#define V850_REG_TMIC2    0xFFFFF122
347
#define V850_REG_TMIC3    0xFFFFF124
348
#define V850_REG_TMIC4    0xFFFFF126
349
#define V850_REG_TMIC5    0xFFFFF128
350
#define V850_REG_TMIC6    0xFFFFF12A
351
#define V850_REG_TMIC7    0xFFFFF12C
352
#define V850_REG_CSIC0    0xFFFFF12E
353
#define V850_REG_SERIC0   0xFFFFF130
354
#define V850_REG_CSIC1    0xFFFFF132
355
#define V850_REG_SRIC0    0xFFFFF132
356
#define V850_REG_STIC0    0xFFFFF134
357
#define V850_REG_CSIC2    0xFFFFF136
358
#define V850_REG_SRIC2    0xFFFFF136
359
#define V850_REG_IICIC1   0xFFFFF138
360
#define V850_REG_SERIC1   0xFFFFF13A
361
#define V850_REG_CSIC3    0xFFFFF13C
362
#define V850_REG_SRIC3    0xFFFFF13C
363
#define V850_REG_STIC1    0xFFFFF13E
364
#define V850_REG_CSIC4    0xFFFFF140
365
#define V850_REG_SRIC4    0xFFFFF140
366
#define V850_REG_IEBIC1   0xFFFFF142
367
#define V850_REG_IEBIC2   0xFFFFF144
368
#define V850_REG_ADIC     0xFFFFF146
369
#define V850_REG_DMAIC0   0xFFFFF148
370
#define V850_REG_DMAIC1   0xFFFFF14A
371
#define V850_REG_DMAIC2   0xFFFFF14C
372
#define V850_REG_DMAIC3   0xFFFFF14E
373
#define V850_REG_DMAIC4   0xFFFFF150
374
#define V850_REG_DMAIC5   0xFFFFF152
375
#define V850_REG_WTNIC    0xFFFFF154
376
#define V850_REG_KRIC     0xFFFFF156
377
 
378
#define V850_REG_ISPR     0xFFFFF166
379
#define V850_REG_PRCMD    0xFFFFF170
380
 
381
#define V850_REG_DIOA0    0xFFFFF180
382
#define V850_REG_DRA0     0xFFFFF182
383
#define V850_REG_DBC0     0xFFFFF184
384
#define V850_REG_DCHC0    0xFFFFF186
385
 
386
#define V850_REG_DIOA1    0xFFFFF190
387
#define V850_REG_DRA1     0xFFFFF192
388
#define V850_REG_DBC1     0xFFFFF194
389
#define V850_REG_DCHC1    0xFFFFF196
390
 
391
#define V850_REG_DIOA2    0xFFFFF1A0
392
#define V850_REG_DRA2     0xFFFFF1A2
393
#define V850_REG_DBC2     0xFFFFF1A4
394
#define V850_REG_DCHC2    0xFFFFF1A6
395
 
396
#define V850_REG_DIOA3    0xFFFFF1B0
397
#define V850_REG_DRA3     0xFFFFF1B2
398
#define V850_REG_DBC3     0xFFFFF1B4
399
#define V850_REG_DCHC3    0xFFFFF1B6
400
 
401
#define V850_REG_DIOA4    0xFFFFF1C0
402
#define V850_REG_DRA4     0xFFFFF1C2
403
#define V850_REG_DBC4     0xFFFFF1C4
404
#define V850_REG_DCHC4    0xFFFFF1C6
405
 
406
#define V850_REG_DIOA5    0xFFFFF1D0
407
#define V850_REG_DRA5     0xFFFFF1D2
408
#define V850_REG_DBC5     0xFFFFF1D4
409
#define V850_REG_DCHC5    0xFFFFF1D6
410
 
411
#define V850_REG_TM0      0xFFFFF200
412
#define V850_REG_CR00     0xFFFFF202
413
#define V850_REG_CR01     0xFFFFF204
414
#define V850_REG_PRM00    0xFFFFF206
415
#define V850_REG_TMC0     0xFFFFF208
416
#define V850_REG_CRC0     0xFFFFF20A
417
#define V850_REG_TOC0     0xFFFFF20C
418
#define V850_REG_PRM01    0xFFFFF20E
419
 
420
#define V850_REG_TM1      0xFFFFF210
421
#define V850_REG_CR10     0xFFFFF212
422
#define V850_REG_CR11     0xFFFFF214
423
#define V850_REG_PRM10    0xFFFFF216
424
#define V850_REG_TMC1     0xFFFFF218
425
#define V850_REG_CRC1     0xFFFFF21A
426
#define V850_REG_TOC1     0xFFFFF21C
427
#define V850_REG_PRM11    0xFFFFF21E
428
 
429
#define V850_REG_TM2      0xFFFFF240
430
#define V850_REG_CR20     0xFFFFF242
431
#define V850_REG_TCL20    0xFFFFF244
432
#define V850_REG_TMC2     0xFFFFF246
433
#define V850_REG_TM23     0xFFFFF24A
434
#define V850_REG_CR23     0xFFFFF24C
435
#define V850_REG_TCL21    0xFFFFF24E
436
 
437
#define V850_REG_TM3      0xFFFFF250
438
#define V850_REG_CR30     0xFFFFF252
439
#define V850_REG_TCL30    0xFFFFF254
440
#define V850_REG_TMC3     0xFFFFF256
441
#define V850_REG_TCL31    0xFFFFF25E
442
 
443
#define V850_REG_TM4      0xFFFFF260
444
#define V850_REG_CR40     0xFFFFF262
445
#define V850_REG_TCL40    0xFFFFF264
446
#define V850_REG_TMC4     0xFFFFF266
447
#define V850_REG_TM45     0xFFFFF26A
448
#define V850_REG_CR45     0xFFFFF26C
449
#define V850_REG_TCL41    0xFFFFF26E
450
 
451
#define V850_REG_TM5      0xFFFFF270
452
#define V850_REG_CR50     0xFFFFF272
453
#define V850_REG_TCL50    0xFFFFF274
454
#define V850_REG_TMC5     0xFFFFF276
455
#define V850_REG_TCL51    0xFFFFF27E
456
 
457
#define V850_REG_TM6      0xFFFFF280
458
#define V850_REG_CR60     0xFFFFF282
459
#define V850_REG_TCL60    0xFFFFF284
460
#define V850_REG_TMC6     0xFFFFF286
461
#define V850_REG_TM67     0xFFFFF28A
462
#define V850_REG_CR67     0xFFFFF28C
463
#define V850_REG_TCL61    0xFFFFF28E
464
 
465
#define V850_REG_TM7      0xFFFFF290
466
#define V850_REG_CR70     0xFFFFF292
467
#define V850_REG_TCL70    0xFFFFF294
468
#define V850_REG_TMC7     0xFFFFF296
469
#define V850_REG_TCL71    0xFFFFF29E
470
 
471
#define V850_REG_SIO0     0xFFFFF2A0
472
#define V850_REG_CSIM0    0xFFFFF2A2
473
#define V850_REG_CSIS0    0xFFFFF2A4
474
 
475
#define V850_REG_SIO1     0xFFFFF2B0
476
#define V850_REG_CSIM1    0xFFFFF2B2
477
#define V850_REG_CSIS1    0xFFFFF2B4
478
 
479
#define V850_REG_SIO2     0xFFFFF2C0
480
#define V850_REG_CSIM2    0xFFFFF2C2
481
#define V850_REG_CSIS2    0xFFFFF2C4
482
 
483
#define V850_REG_SIO3     0xFFFFF2D0
484
#define V850_REG_CSIM3    0xFFFFF2D2
485
#define V850_REG_CSIS3    0xFFFFF2D4
486
 
487
#define V850_REG_SIO4     0xFFFFF2E0
488
#define V850_REG_CSIM4    0xFFFFF2E2
489
#define V850_REG_CSIB4    0xFFFFF2E4
490
#define V850_REG_BRGCN4   0xFFFFF2E6
491
#define V850_REG_BRGCK4   0xFFFFF2E8
492
 
493
#define V850_REG_ASIM0    0xFFFFF300
494
#define V850_REG_ASIS0    0xFFFFF302
495
#define V850_REG_BRGC0    0xFFFFF304
496
#define V850_REG_TXS0     0xFFFFF306
497
#define V850_REG_RXB0     0xFFFFF308
498
#define V850_REG_BRGMC00  0xFFFFF30E
499
 
500
#define V850_REG_ASIM1    0xFFFFF310
501
#define V850_REG_ASIS1    0xFFFFF312
502
#define V850_REG_BRGC1    0xFFFFF314
503
#define V850_REG_TXS1     0xFFFFF316
504
#define V850_REG_RXB1     0xFFFFF318
505
#define V850_REG_BRGMC10  0xFFFFF31E
506
#define V850_REG_BRGMC01  0xFFFFF320
507
#define V850_REG_BRGMC11  0xFFFFF322
508
 
509
#define V850_REG_IICC0    0xFFFFF340
510
#define V850_REG_IICS0    0xFFFFF342
511
#define V850_REG_IICCL0   0xFFFFF344
512
#define V850_REG_SVA0     0xFFFFF346
513
#define V850_REG_IIC0     0xFFFFF348
514
#define V850_REG_IICX0    0xFFFFF34A
515
#define V850_REG_IICCE0   0xFFFFF34C
516
 
517
#define V850_REG_IICC1    0xFFFFF350
518
#define V850_REG_IICS1    0xFFFFF352
519
#define V850_REG_IICCL1   0xFFFFF354
520
#define V850_REG_SVA1     0xFFFFF356
521
#define V850_REG_IIC1     0xFFFFF358
522
#define V850_REG_IICX1    0xFFFFF35A
523
#define V850_REG_IICCE1   0xFFFFF35C
524
 
525
#define V850_REG_WTNM     0xFFFFF360
526
#define V850_REG_WTNCS    0xFFFFF364
527
 
528
#define V850_REG_CORCN    0xFFFFF36C
529
#define V850_REG_CORRQ    0xFFFFF36E
530
#define V850_REG_CORAD0   0xFFFFF370
531
#define V850_REG_CORAD1   0xFFFFF374
532
#define V850_REG_CORAD2   0xFFFFF378
533
#define V850_REG_CORAD3   0xFFFFF37C
534
 
535
#define V850_REG_OSTS     0xFFFFF380
536
#define V850_REG_WDCS     0xFFFFF382
537
#define V850_REG_WDTM     0xFFFFF384
538
#define V850_REG_DMAS     0xFFFFF38E
539
 
540
#define V850_REG_RTBL     0xFFFFF3A0
541
#define V850_REG_RTBH     0xFFFFF3A2
542
#define V850_REG_RTPM     0xFFFFF3A4
543
#define V850_REG_RTPC     0xFFFFF3A6
544
 
545
#define V850_REG_ADM1     0xFFFFF3C0
546
#define V850_REG_ADS      0xFFFFF3C2
547
#define V850_REG_ADCR     0xFFFFF3C4
548
#define V850_REG_ADCRH    0xFFFFF3C6
549
#define V850_REG_ADM2     0xFFFFF3C8
550
 
551
#define V850_REG_KRM      0xFFFFF3D0
552
 
553
#define V850_REG_NCC      0xFFFFF3D4
554
 
555
#else // elif CYGINT_HAL_V850_VARIANT_SB1
556
# error No v850 variant defined
557
#endif
558
 
559
 
560
/*---------------------------------------------------------------------------*/
561
/* end of v850_common.h                                                         */
562
#endif /* CYGONCE_V850_COMMON_H */

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