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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [v85x/] [v850/] [v2_0/] [src/] [hal_diag.c] - Blame information for rev 454

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/*=============================================================================
2
//
3
//      hal_diag.c
4
//
5
//      HAL diagnostic output code
6
//
7
//=============================================================================
8
//####ECOSGPLCOPYRIGHTBEGIN####
9
// -------------------------------------------
10
// This file is part of eCos, the Embedded Configurable Operating System.
11
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12
//
13
// eCos is free software; you can redistribute it and/or modify it under
14
// the terms of the GNU General Public License as published by the Free
15
// Software Foundation; either version 2 or (at your option) any later version.
16
//
17
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
20
// for more details.
21
//
22
// You should have received a copy of the GNU General Public License along
23
// with eCos; if not, write to the Free Software Foundation, Inc.,
24
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25
//
26
// As a special exception, if other files instantiate templates or use macros
27
// or inline functions from this file, or you compile this file and link it
28
// with other works to produce a work based on this file, this file does not
29
// by itself cause the resulting work to be covered by the GNU General Public
30
// License. However the source code for this file must still be made available
31
// in accordance with section (3) of the GNU General Public License.
32
//
33
// This exception does not invalidate any other reasons why a work based on
34
// this file might be covered by the GNU General Public License.
35
//
36
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37
// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
39
//####ECOSGPLCOPYRIGHTEND####
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//=============================================================================
41
//#####DESCRIPTIONBEGIN####
42
//
43
// Author(s):   nickg, gthomas
44
// Contributors:nickg, gthomas, jlarmour
45
// Date:        2001-03-21
46
// Purpose:     HAL diagnostic output
47
// Description: Implementations of HAL diagnostic output support.
48
//
49
//####DESCRIPTIONEND####
50
//
51
//===========================================================================*/
52
 
53
#include <pkgconf/hal.h>
54
 
55
#if CYGINT_HAL_V850_DIAG_ONCHIP_SERIAL0
56
 
57
#include <pkgconf/system.h>
58
#include CYGBLD_HAL_PLATFORM_H
59
 
60
#include <cyg/infra/cyg_type.h>         // base types
61
#include <cyg/infra/cyg_ass.h>          // assertion macros
62
 
63
#include <cyg/hal/hal_arch.h>           // basic machine info
64
#include <cyg/hal/hal_intr.h>           // interrupt macros
65
#include <cyg/hal/hal_io.h>             // IO macros
66
#include <cyg/hal/hal_diag.h>
67
 
68
#include <cyg/hal/hal_stub.h>           // target_register_t
69
#include <cyg/hal/hal_if.h>             // Calling interface definitions
70
#include <cyg/hal/hal_misc.h>           // Helper functions
71
#include <cyg/hal/drv_api.h>            // CYG_ISR_HANDLED
72
 
73
#include <cyg/hal/v850_common.h>        // hardware registers, etc.
74
 
75
 
76
#define BAUD_COUNT ((CYGHWR_HAL_V85X_CPU_FREQ/2)/CYGHWR_HAL_V85X_V850_DIAG_BAUD)
77
#define BAUD_DIVISOR 1
78
 
79
/*---------------------------------------------------------------------------*/
80
// V850
81
 
82
void
83
init_serial_channel(void* base)
84
{
85
    volatile unsigned char *mode = (volatile unsigned char *)V850_REG_ASIM0;
86
    volatile unsigned char *brgc = (volatile unsigned char *)V850_REG_BRGC0;
87
    volatile unsigned char *brgm0 = (volatile unsigned char *)V850_REG_BRGMC00;
88
#ifdef V850_REG_BRGMC01
89
    volatile unsigned char *brgm1 = (volatile unsigned char *)V850_REG_BRGMC01;
90
#endif
91
    volatile unsigned char *rxstat = (volatile unsigned char *)V850_REG_SRIC0;
92
    volatile unsigned char *rxerr = (volatile unsigned char *)V850_REG_SERIC0;
93
    volatile unsigned char *txstat = (volatile unsigned char *)V850_REG_STIC0;
94
    int count = BAUD_COUNT;
95
    int divisor = BAUD_DIVISOR;
96
 
97
    while (count > 0xFF) {
98
        count >>= 1;
99
        divisor++;
100
    }
101
 
102
    *mode = 0xC8;
103
    *brgc = count;
104
    *brgm0 = divisor & 0x07;
105
#ifdef V850_REG_BRGMC01
106
    *brgm1 = divisor >> 3;
107
#endif
108
    *rxstat = 0x47;
109
    *rxerr = 0;
110
    *txstat = 0x47;
111
}
112
 
113
// Actually send character down the wire
114
void
115
cyg_hal_plf_serial_putc(void* __ch_data, cyg_uint8 c)
116
{
117
    volatile unsigned char *TxDATA = (volatile unsigned char *)V850_REG_TXS0;
118
    volatile unsigned char *TxSTAT = (volatile unsigned char *)V850_REG_STIC0;
119
    int timeout = 0xFFFF;
120
 
121
    CYGARC_HAL_SAVE_GP();
122
 
123
    // Send character
124
    *TxDATA = (unsigned char)c;
125
    // Wait for Tx not busy
126
    while ((*TxSTAT & 0x80) == 0x00) {
127
        if (--timeout == 0)
128
            break;
129
    }
130
    *TxSTAT &= ~0x80;
131
 
132
    CYGARC_HAL_RESTORE_GP();
133
}
134
 
135
static cyg_bool
136
cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch)
137
{
138
    volatile unsigned char *RxDATA = (volatile unsigned char *)V850_REG_RXB0;
139
    volatile unsigned char *RxSTAT = (volatile unsigned char *)V850_REG_SRIC0;
140
 
141
    if ((*RxSTAT & 0x80) == 0x00)
142
        return false;
143
 
144
    *ch = (char)*RxDATA;
145
    *RxSTAT &= ~0x80;
146
    return true;
147
}
148
 
149
cyg_uint8
150
cyg_hal_plf_serial_getc(void* __ch_data)
151
{
152
    cyg_uint8 ch;
153
    CYGARC_HAL_SAVE_GP();
154
 
155
    while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch));
156
 
157
    CYGARC_HAL_RESTORE_GP();
158
    return ch;
159
}
160
 
161
static void
162
cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf,
163
                         cyg_uint32 __len)
164
{
165
    CYGARC_HAL_SAVE_GP();
166
 
167
    while(__len-- > 0)
168
        cyg_hal_plf_serial_putc(__ch_data, *__buf++);
169
 
170
    CYGARC_HAL_RESTORE_GP();
171
}
172
 
173
static void
174
cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len)
175
{
176
    CYGARC_HAL_SAVE_GP();
177
 
178
    while(__len-- > 0)
179
        *__buf++ = cyg_hal_plf_serial_getc(__ch_data);
180
 
181
    CYGARC_HAL_RESTORE_GP();
182
}
183
 
184
static cyg_int32 msec_timeout = 1000;
185
 
186
cyg_bool
187
cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch)
188
{
189
    int delay_count = msec_timeout * 10; // delay in .1 ms steps
190
    cyg_bool res;
191
    CYGARC_HAL_SAVE_GP();
192
 
193
    for(;;) {
194
        res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch);
195
        if (res || 0 == delay_count--)
196
            break;
197
 
198
        CYGACC_CALL_IF_DELAY_US(100);
199
    }
200
 
201
    CYGARC_HAL_RESTORE_GP();
202
    return res;
203
}
204
 
205
static int
206
cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...)
207
{
208
    static int irq_state = 0;
209
    int ret = 0;
210
    CYGARC_HAL_SAVE_GP();
211
 
212
    switch (__func) {
213
    case __COMMCTL_IRQ_ENABLE:
214
        HAL_INTERRUPT_UNMASK(CYGNUM_HAL_VECTOR_INTCSI1);
215
        irq_state = 1;
216
        break;
217
    case __COMMCTL_IRQ_DISABLE:
218
        ret = irq_state;
219
        irq_state = 0;
220
        HAL_INTERRUPT_MASK(CYGNUM_HAL_VECTOR_INTCSI1);
221
        break;
222
    case __COMMCTL_DBG_ISR_VECTOR:
223
        ret = CYGNUM_HAL_VECTOR_INTCSI1;
224
        break;
225
    case __COMMCTL_SET_TIMEOUT:
226
    {
227
        va_list ap;
228
 
229
        va_start(ap, __func);
230
 
231
        ret = msec_timeout;
232
        msec_timeout = va_arg(ap, cyg_uint32);
233
 
234
        va_end(ap);
235
    }
236
    default:
237
        break;
238
    }
239
    CYGARC_HAL_RESTORE_GP();
240
    return ret;
241
}
242
 
243
static int
244
cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc,
245
                       CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
246
{
247
    volatile unsigned char *RxDATA = (volatile unsigned char *)V850_REG_RXB0;
248
    cyg_uint8 c;
249
    int res = 0;
250
    CYGARC_HAL_SAVE_GP();
251
 
252
    c = (char)*RxDATA;
253
    *__ctrlc = 0;
254
    if( cyg_hal_is_break( &c , 1 ) )
255
        *__ctrlc = 1;
256
 
257
    cyg_drv_interrupt_acknowledge(CYGNUM_HAL_VECTOR_INTCSI1);
258
 
259
    res = CYG_ISR_HANDLED;
260
 
261
    CYGARC_HAL_RESTORE_GP();
262
    return res;
263
}
264
 
265
static void
266
cyg_hal_plf_serial_init(void)
267
{
268
    hal_virtual_comm_table_t* comm;
269
    int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
270
 
271
    // Disable interrupts.
272
    HAL_INTERRUPT_MASK(CYGNUM_HAL_VECTOR_INTCSI1);
273
 
274
    // Init channels
275
    init_serial_channel((cyg_uint8*)0);
276
 
277
    // Setup procs in the vector table
278
 
279
    // Set channel 0
280
    CYGACC_CALL_IF_SET_CONSOLE_COMM(0);
281
    comm = CYGACC_CALL_IF_CONSOLE_PROCS();
282
    CYGACC_COMM_IF_CH_DATA_SET(*comm, 0);
283
    CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
284
    CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
285
    CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
286
    CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
287
    CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
288
    CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
289
    CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
290
 
291
    // Restore original console
292
    CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
293
}
294
 
295
__externC void cyg_hal_plf_ice_diag_init();
296
 
297
void
298
cyg_hal_plf_comms_init(void)
299
{
300
    static int initialized = 0;
301
 
302
    if (initialized)
303
        return;
304
 
305
    initialized = 1;
306
 
307
    cyg_hal_plf_serial_init();
308
 
309
#ifdef CYGDBG_HAL_V85X_V850_ICE_DIAG
310
    cyg_hal_plf_ice_diag_init();
311
#endif
312
}
313
 
314
//=============================================================================
315
// Compatibility with older stubs
316
//=============================================================================
317
 
318
#ifndef CYGSEM_HAL_VIRTUAL_VECTOR_DIAG
319
 
320
// Assumption: all diagnostic output must be GDB packetized unless this is a ROM (i.e.
321
// totally stand-alone) system.
322
 
323
//#ifdef CYGSEM_HAL_ROM_MONITOR
324
//#define CYG_HAL_STARTUP_ROM
325
//#undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
326
//#endif
327
 
328
#if (defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)) \
329
    && !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
330
#define HAL_DIAG_USES_HARDWARE
331
#else
332
#if !defined(CYGDBG_HAL_DIAG_TO_DEBUG_CHAN)
333
#define HAL_DIAG_USES_HARDWARE
334
#endif
335
#endif
336
 
337
void hal_diag_init(void)
338
{
339
    init_serial_channel(0);
340
}
341
 
342
#ifdef HAL_DIAG_USES_HARDWARE
343
 
344
void hal_diag_write_char(char c)
345
{
346
    CYG_INTERRUPT_STATE old;
347
    HAL_DISABLE_INTERRUPTS(old);
348
    cyg_hal_plf_serial_putc(0, c);
349
    HAL_RESTORE_INTERRUPTS(old);
350
}
351
 
352
void hal_diag_read_char(char *c)
353
{
354
    *c = cyg_hal_plf_serial_getc(0);
355
}
356
 
357
#else // HAL_DIAG relies on GDB
358
 
359
void
360
hal_diag_read_char(char *c)
361
{
362
    *c = cyg_hal_plf_serial_getc(0);
363
}
364
 
365
void
366
hal_diag_write_char(char c)
367
{
368
    static char line[100];
369
    static int pos = 0;
370
 
371
    // No need to send CRs
372
    if( c == '\r' ) return;
373
 
374
    line[pos++] = c;
375
 
376
    if( c == '\n' || pos == sizeof(line) )
377
    {
378
        CYG_INTERRUPT_STATE old;
379
 
380
        // Disable interrupts. This prevents GDB trying to interrupt us
381
        // while we are in the middle of sending a packet. The serial
382
        // receive interrupt will be seen when we re-enable interrupts
383
        // later.
384
 
385
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
386
        CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old);
387
#else
388
        HAL_DISABLE_INTERRUPTS(old);
389
#endif
390
 
391
        while(1)
392
        {
393
            static char hex[] = "0123456789ABCDEF";
394
            cyg_uint8 csum = 0;
395
            int i;
396
            char c1;
397
 
398
            cyg_hal_plf_serial_putc(0, '$');
399
            cyg_hal_plf_serial_putc(0, 'O');
400
            csum += 'O';
401
            for( i = 0; i < pos; i++ )
402
            {
403
                char ch = line[i];
404
                char h = hex[(ch>>4)&0xF];
405
                char l = hex[ch&0xF];
406
                cyg_hal_plf_serial_putc(0, h);
407
                cyg_hal_plf_serial_putc(0, l);
408
                csum += h;
409
                csum += l;
410
            }
411
            cyg_hal_plf_serial_putc(0, '#');
412
            cyg_hal_plf_serial_putc(0, hex[(csum>>4)&0xF]);
413
            cyg_hal_plf_serial_putc(0, hex[csum&0xF]);
414
 
415
            // Wait for the ACK character '+' from GDB here and handle
416
            // receiving a ^C instead.  This is the reason for this clause
417
            // being a loop.
418
            c1 = cyg_hal_plf_serial_getc(0);
419
 
420
            if( c1 == '+' )
421
                break;              // a good acknowledge
422
 
423
#if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) && \
424
    defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
425
            cyg_drv_interrupt_acknowledge(CYGNUM_HAL_VECTOR_INTCSI1);
426
            if( c1 == 3 ) {
427
                // Ctrl-C: breakpoint.
428
                cyg_hal_gdb_interrupt (__builtin_return_address(0));
429
                break;
430
            }
431
#endif
432
            // otherwise, loop round again
433
        }
434
 
435
        pos = 0;
436
 
437
        // And re-enable interrupts
438
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
439
        CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old);
440
#else
441
        HAL_RESTORE_INTERRUPTS(old);
442
#endif
443
    }
444
}
445
#endif  // USE HARDWARE
446
 
447
#endif // CYGSEM_HAL_VIRTUAL_VECTOR_DIAG
448
 
449
#endif // #if CYGINT_HAL_V850_DIAG_ONCHIP_SERIAL0
450
 
451
/*---------------------------------------------------------------------------*/
452
/* End of hal_diag.c */

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