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[/] [openrisc/] [trunk/] [rtos/] [ecos-2.0/] [packages/] [hal/] [v85x/] [v850/] [v2_0/] [src/] [v850_stub.c] - Blame information for rev 174

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//========================================================================
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//
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//      v850_stub.c
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//
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//      Helper functions for stub, generic to all NEC processors
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//
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//========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s):     Red Hat, gthomas, jlarmour
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// Contributors:  Red Hat, gthomas, jskov
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// Date:          1998-11-26
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// Purpose:       
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// Description:   Helper functions for stub, generic to all NEC processors
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// Usage:         
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//
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//####DESCRIPTIONEND####
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//
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//========================================================================
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#include <stddef.h>
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#include <pkgconf/hal.h>
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#ifdef CYGPKG_CYGMON
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#include <pkgconf/cygmon.h>
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#endif
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#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
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#include <cyg/hal/dbg-threads-api.h>
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#endif
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#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
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#include <cyg/hal/hal_stub.h>
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#include <cyg/hal/hal_arch.h>
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#include <cyg/hal/hal_intr.h>
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#ifndef FALSE
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#define FALSE 0
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#define TRUE  1
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#endif
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/* Given a trap value TRAP, return the corresponding signal. */
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int __computeSignal (unsigned int trap_number)
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{
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    unsigned short curins, *pc;
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    switch (trap_number) {
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    case CYGNUM_HAL_VECTOR_INTWDT: // watchdog timer NMI
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        pc = (unsigned short *)_hal_registers->pc;
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        curins = *pc;
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        if (curins == 0x0585) {
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            // "br *" - used for breakpoint
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            return SIGTRAP;
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        } else {
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            // Anything else - just ignore it happened
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            return 0;
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        }
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    case CYGNUM_HAL_VECTOR_NMI:
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        return SIGINT;
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    default:
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        return SIGTRAP;
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    }
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}
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/* Return the trap number corresponding to the last-taken trap. */
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int __get_trap_number (void)
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{
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    // The vector is not not part of the GDB register set so get it
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    // directly from the save context.
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    return _hal_registers->vector;
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}
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/* Set the currently-saved pc register value to PC. */
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void set_pc (target_register_t pc)
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{
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    put_register (PC, pc);
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}
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/*----------------------------------------------------------------------
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 * Single-step support
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 */
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/* Set things up so that the next user resume will execute one instruction.
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   This may be done by setting breakpoints or setting a single step flag
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   in the saved user registers, for example. */
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static unsigned short *ss_saved_pc = 0;
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static unsigned short  ss_saved_instr[2];
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static int             ss_saved_instr_size;
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#define FIXME() {diag_printf("FIXME - %s\n", __FUNCTION__); }
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static unsigned short *
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next_pc(unsigned short *pc)
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{
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    unsigned short curins = *pc;
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    unsigned short *newpc = pc;
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    switch ((curins & 0x0780) >> 7) {
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    case 0x0:
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        if ((curins & 0x60) == 0x60) {
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            int Rn = curins & 0x1F;
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            newpc = (unsigned short *)get_register(Rn);
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        } else {
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            newpc = pc+1;
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        }
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        break;
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    case 0x1:
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    case 0x2:
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    case 0x3:
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    case 0x4:
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    case 0x5:
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        // Arithmetic - no branch opcodes
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        newpc = pc+1;
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        break;
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    case 0x6:
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    case 0x7:
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    case 0x8:
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    case 0x9:
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    case 0xA:
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        // Load and store - no branch opcodes
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        newpc = pc+2;
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        break;
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    case 0xB:
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        // Conditional branch
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        if (1) {
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            unsigned long psw = get_register(PSW);
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#define PSW_SAT 0x10
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#define PSW_CY  0x08
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#define PSW_OV  0x04
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#define PSW_S   0x02
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#define PSW_Z   0x01
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            long disp = ((curins & 0xF800) >> 8) | ((curins & 0x70) >> 4);
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            int cc = curins & 0x0F;
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            int S = (psw & PSW_S) != 0;
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            int Z = (psw & PSW_Z) != 0;
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            int OV = (psw & PSW_OV) != 0;
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            int CY = (psw & PSW_CY) != 0;
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            int do_branch = 0;
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            if (curins & 0x8000) disp |= 0xFFFFFF00;
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            switch (cc) {
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            case 0x0: // BV
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                do_branch = (OV == 1);
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                break;
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            case 0x1: // BL
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                do_branch = (CY == 1);
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                break;
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            case 0x2: // BE
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                do_branch = (Z == 1);
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                break;
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            case 0x3: // BNH
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                do_branch = ((CY | Z) == 1);
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                break;
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            case 0x4: // BN
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                do_branch = (S == 1);
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                break;
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            case 0x5: // - always
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                do_branch = 1;
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                break;
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            case 0x6: // BLT
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                do_branch = ((S ^ OV) == 1);
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                break;
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            case 0x7: // BLE
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                do_branch = (((S ^ OV) | Z) == 1);
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                break;
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            case 0x8: // BNV
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                do_branch = (OV == 0);
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                break;
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            case 0x9: // BNL
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                do_branch = (CY == 0);
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                break;
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            case 0xA: // BNE
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                do_branch = (Z == 0);
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                break;
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            case 0xB: // BH
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                do_branch = ((CY | Z) == 0);
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                break;
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            case 0xC: // BP
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                do_branch = (S == 0);
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                break;
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            case 0xD: // BSA
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                do_branch = ((psw & PSW_SAT) != 0);
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                break;
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            case 0xE: // BGE
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                do_branch = ((S ^ OV) == 0);
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                break;
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            case 0xF: // BGT
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                do_branch = (((S ^ OV) | Z) == 0);
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                break;
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            }
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            if (do_branch) {
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                newpc = pc + disp;
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            } else {
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                newpc = pc + 1;
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            }
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        }
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        break;
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    case 0xC:
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    case 0xD:
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    case 0xE:
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        // Arithmetic & load/store - no branch opcodes
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        newpc = pc+2;
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        break;
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    case 0xF:
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        if ((curins & 0x60) >= 0x40) {
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            // Bitfield and extended instructions - no branch opcodes
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            newpc = pc+2;
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        } else {
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            // JR/JARL
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            long disp = ((curins & 0x3F) << 16) | *(pc+1);
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            if (curins & 0x20) disp |= 0xFFC00000;
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            newpc = pc + (disp>>1);
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        }
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    }
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    return newpc;
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}
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void __single_step (void)
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{
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    unsigned short *pc = (unsigned short *)get_register(PC);
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    unsigned short *break_pc;
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    unsigned short  _breakpoint[] = {0x07E0, 0x0780};
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    unsigned short *breakpoint = _breakpoint;
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    // If the current instruction is a branch, decide if the branch will
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    // be taken to determine where to set the breakpoint.
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    break_pc = next_pc(pc);
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    // Now see what kind of breakpoint can be used.
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    // Note: since this is a single step, always use the 32 bit version.
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    ss_saved_pc = break_pc;
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    ss_saved_instr_size = 2;
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    ss_saved_instr[0] = *break_pc;
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    *break_pc++ = *breakpoint++;
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    ss_saved_instr[1] = *break_pc;
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    *break_pc++ = *breakpoint++;
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}
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/* Clear the single-step state. */
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276
void __clear_single_step (void)
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{
278
    unsigned short *pc, *val;
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    int i;
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    if (ss_saved_instr_size != 0) {
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        pc = ss_saved_pc;
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        val = ss_saved_instr;
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        for (i = 0;  i < ss_saved_instr_size;  i++) {
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            *pc++ = *val++;
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        }
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        ss_saved_instr_size = 0;
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    }
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}
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#if !defined(CYGPKG_CYGMON)
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void __install_breakpoints (void)
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{
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//    FIXME();
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}
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void __clear_breakpoints (void)
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{
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//    FIXME();
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}
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#endif // !CYGPKG_CYGMON
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/* If the breakpoint we hit is in the breakpoint() instruction, return a
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   non-zero value. */
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int
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__is_breakpoint_function ()
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{
308
    return get_register (PC) == (target_register_t)&_breakinst;
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}
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/* Skip the current instruction.  Since this is only called by the
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   stub when the PC points to a breakpoint or trap instruction,
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*/
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void __skipinst (void)
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{
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    unsigned short *pc = (unsigned short *)get_register(PC);
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    pc = next_pc(pc);
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    put_register(PC, (unsigned long)pc);
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}
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#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
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// EOF v850_stub.c

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