OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [compat/] [uitron/] [current/] [tests/] [testcxx.cxx] - Blame information for rev 856

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 786 skrzyp 
//===========================================================================
2 
//
3 
//      testcxx.cxx
4 
//
5 
//      uITRON "C++" test program
6 
//
7 
//===========================================================================
8 
// ####ECOSGPLCOPYRIGHTBEGIN####
9 
// -------------------------------------------
10 
// This file is part of eCos, the Embedded Configurable Operating System.
11 
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
12 
//
13 
// eCos is free software; you can redistribute it and/or modify it under
14 
// the terms of the GNU General Public License as published by the Free
15 
// Software Foundation; either version 2 or (at your option) any later
16 
// version.
17 
//
18 
// eCos is distributed in the hope that it will be useful, but WITHOUT
19 
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
20 
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
21 
// for more details.
22 
//
23 
// You should have received a copy of the GNU General Public License
24 
// along with eCos; if not, write to the Free Software Foundation, Inc.,
25 
// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
26 
//
27 
// As a special exception, if other files instantiate templates or use
28 
// macros or inline functions from this file, or you compile this file
29 
// and link it with other works to produce a work based on this file,
30 
// this file does not by itself cause the resulting work to be covered by
31 
// the GNU General Public License. However the source code for this file
32 
// must still be made available in accordance with section (3) of the GNU
33 
// General Public License v2.
34 
//
35 
// This exception does not invalidate any other reasons why a work based
36 
// on this file might be covered by the GNU General Public License.
37 
// -------------------------------------------
38 
// ####ECOSGPLCOPYRIGHTEND####
39 
//===========================================================================
40 
//#####DESCRIPTIONBEGIN####
41 
//
42 
// Author(s):   hmt
43 
// Contributors:        hmt
44 
// Date:        1998-03-13
45 
// Purpose:     uITRON API testing
46 
// Description:
47 
//
48 
//####DESCRIPTIONEND####
49 
//
50 
//===========================================================================
51 
 
52 
#include <pkgconf/uitron.h>             // uITRON setup CYGNUM_UITRON_SEMAS
53 
                                        // CYGPKG_UITRON et al
54 
#include <cyg/infra/testcase.h>         // testing infrastructure
55 
 
56 
#ifdef CYGPKG_UITRON                    // we DO want the uITRON package
57 
 
58 
#ifdef CYGSEM_KERNEL_SCHED_MLQUEUE      // we DO want prioritized threads
59 
 
60 
#ifdef CYGFUN_KERNEL_THREADS_TIMER      // we DO want timout-able calls
61 
 
62 
#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK     // we DO want the realtime clock
63 
 
64 
// we're OK if it's C++ or neither of those two is defined:
65 
#if defined( __cplusplus ) || \
66 
    (!defined( CYGIMP_UITRON_INLINE_FUNCS ) && \
67 
     !defined( CYGIMP_UITRON_CPP_OUTLINE_FUNCS) )
68 
 
69 
// =================== TEST CONFIGURATION ===================
70 
#if \
71 
    /* test configuration for enough tasks */                      \
72 
    (CYGNUM_UITRON_TASKS >= 4)                                  && \
73 
    (CYGNUM_UITRON_TASKS < 90)                                  && \
74 
    (CYGNUM_UITRON_START_TASKS == 1)                            && \
75 
    ( !defined(CYGPKG_UITRON_TASKS_CREATE_DELETE) ||               \
76 
      CYGNUM_UITRON_TASKS_INITIALLY >= 4             )          && \
77 
                                                                   \
78 
    /* the end of the large #if statement */                       \
79 
    1
80 
 
81 
// ============================ END ============================
82 
 
83 
 
84 
 
85 
#include <cyg/compat/uitron/uit_func.h> // uITRON
86 
 
87 
externC void
88 
cyg_package_start( void )
89 
{
90 
    CYG_TEST_INIT();
91 
    CYG_TEST_INFO( "Calling cyg_uitron_start()" );
92 
    cyg_uitron_start();
93 
}
94 
 
95 
volatile int intercom = 0;
96 
volatile int intercount = 0;
97 
INT scratch = 0;
98 
 
99 
extern "C" {
100 
    void task1( unsigned int arg );
101 
    void task2( unsigned int arg );
102 
    void task3( unsigned int arg );
103 
    void task4( unsigned int arg );
104 
}
105 
 
106 
 
107 
#ifndef CYGSEM_KERNEL_SCHED_TIMESLICE
108 
#define TIMESLICEMSG "Assuming no kernel timeslicing"
109 
#define TSGO()          (1)
110 
#define TSRELEASE()     CYG_EMPTY_STATEMENT
111 
#define TSSTOP()        CYG_EMPTY_STATEMENT
112 
#define TSLOCK()        CYG_EMPTY_STATEMENT
113 
#define TSUNLOCK()      CYG_EMPTY_STATEMENT
114 
#define ICWAIT( _i_ )   CYG_EMPTY_STATEMENT
115 
 
116 
#else
117 
// Now follow some nasty bodges to control the scheduling when basically it
118 
// isn't controlled ie. timeslicing is on.  It's bodgy because we're
119 
// testing normal synchronization methods, so we shouldn't rely on them for
120 
// comms between threads here.  Instead there's a mixture of communicating
121 
// via a flag (ts_interlock) which stops the "controlled" thread running
122 
// away, and waiting for the controlled thread to run enough for us.
123 
//
124 
// Tasks 3 and 4 are waited for by the control task: task 3 locks the
125 
// scheduler so is immediately descheduled when it unlocks it, task 4 does
126 
// waiting-type operations, so we must give it chance to run by yielding a
127 
// few times ourselves.  Note the plain constant in ICWAIT() below.
128 
 
129 
#define TIMESLICEMSG "Assuming kernel timeslicing ENABLED"
130 
volatile int ts_interlock = 0;
131 
#define TSGO()          (ts_interlock)
132 
#define TSRELEASE()     ts_interlock = 1
133 
#define TSSTOP()        ts_interlock = 0
134 
 
135 
#define TSLOCK()        CYG_MACRO_START                                 \
136 
    ER ercd2 = dis_dsp();                                               \
137 
    CYG_TEST_CHECK( E_OK == ercd2, "dis_dsp (TSLOCK) bad ercd2" );      \
138 
CYG_MACRO_END
139 
 
140 
#define TSUNLOCK()      CYG_MACRO_START                                 \
141 
    ER ercd3 = ena_dsp();                                               \
142 
    CYG_TEST_CHECK( E_OK == ercd3, "ena_dsp (TSUNLOCK) bad ercd3" );    \
143 
CYG_MACRO_END
144 
 
145 
#define ICWAIT( _i_ )   CYG_MACRO_START                                 \
146 
    int loops;                                                          \
147 
    for ( loops = 3; (0 < loops) || ((_i_) > intercount); loops-- ) {   \
148 
        ER ercd4 = rot_rdq( 0 ); /* yield */                            \
149 
        CYG_TEST_CHECK( E_OK == ercd4, "rot_rdq (ICWAIT) bad ercd4" );  \
150 
    }                                                                   \
151 
CYG_MACRO_END
152 
#endif // CYGSEM_KERNEL_SCHED_TIMESLICE
153 
 
154 
/*
155 
#define IC() \
156 
CYG_MACRO_START \
157 
  static char *msgs[] = { "ZERO", "ONE", "TWO", "THREE", "FOUR", "LOTS" }; \
158 
  CYG_TEST_INFO( msgs[ intercount > 5 ? 5 : intercount ] ); \
159 
CYG_MACRO_END
160 
*/
161 
 
162 
// #define CYG_TEST_UITRON_TEST1_LOOPING 1
163 
 
164 
void task1( unsigned int arg )
165 
{
166 
    ER ercd;
167 
    T_RTSK ref_tskd;
168 
 
169 
#ifdef CYG_TEST_UITRON_TEST1_LOOPING
170 
    while ( 1 ) {
171 
#endif // CYG_TEST_UITRON_TEST1_LOOPING
172 
 
173 
    CYG_TEST_INFO( "Task 1 running" );
174 
    CYG_TEST_INFO( TIMESLICEMSG );
175 
 
176 
    intercom = 0;
177 
    intercount = 0;
178 
 
179 
    CYG_TEST_INFO( "Testing get_tid and ref_tsk" );
180 
    ercd = get_tid( &scratch );
181 
    CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
182 
    CYG_TEST_CHECK( 1 == scratch, "tid not 1" );
183 
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
184 
#ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR
185 
    ercd = get_tid( NULL );
186 
    CYG_TEST_CHECK( E_PAR == ercd, "get_tid bad ercd !E_PAR" );
187 
#endif
188 
    ercd = ref_tsk( &ref_tskd, -6 );
189 
    CYG_TEST_CHECK( E_ID == ercd, "ref_tsk bad ercd !E_ID" );
190 
    ercd = ref_tsk( &ref_tskd, 99 );
191 
    CYG_TEST_CHECK( E_ID == ercd, "ref_tsk bad ercd !E_ID" );
192 
#ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR
193 
    ercd = ref_tsk( NULL, 1 );
194 
    CYG_TEST_CHECK( E_PAR == ercd, "ref_tsk bad ercd !E_PAR" );
195 
#endif
196 
#endif // we can test bad param error returns
197 
    ercd = ref_tsk( &ref_tskd, 1 );
198 
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
199 
    CYG_TEST_CHECK( TTS_RUN == ref_tskd.tskstat, "Bad task status 1" );
200 
    ercd = ref_tsk( &ref_tskd, 0 );
201 
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
202 
    CYG_TEST_CHECK( TTS_RUN == ref_tskd.tskstat, "Bad task status 0" );
203 
    ercd = ref_tsk( &ref_tskd, 2 );
204 
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
205 
    CYG_TEST_CHECK( TTS_DMT == ref_tskd.tskstat, "Bad task status 2" );
206 
    CYG_TEST_CHECK( 2 == ref_tskd.tskpri, "Bad task prio 2" );
207 
 
208 
    ercd = rsm_tsk( 2 );
209 
    CYG_TEST_CHECK( E_OBJ == ercd, "rsm_tsk DMT bad ercd !E_OBJ" );
210 
    ercd = frsm_tsk( 2 );
211 
    CYG_TEST_CHECK( E_OBJ == ercd, "frsm_tsk DMT bad ercd !E_OBJ" );
212 
    ercd = rel_wai( 2 );
213 
    CYG_TEST_CHECK( E_OBJ == ercd, "rel_wai DMT bad ercd !E_OBJ" );
214 
    ercd = sus_tsk( 2 );
215 
    CYG_TEST_CHECK( E_OBJ == ercd, "sus_tsk DMT bad ercd !E_OBJ" );
216 
    ercd = wup_tsk( 2 );
217 
    CYG_TEST_CHECK( E_OBJ == ercd, "wup_tsk DMT bad ercd !E_OBJ" );
218 
    ercd = can_wup( &scratch, 2 );
219 
    CYG_TEST_CHECK( E_OBJ == ercd, "can_wup DMT bad ercd !E_OBJ" );
220 
 
221 
    CYG_TEST_PASS( "get_tid, ref_tsk" );
222 
 
223 
    CYG_TEST_INFO( "Testing prio change and start task" );
224 
    ercd = sta_tsk( 2, 99 );
225 
    CYG_TEST_CHECK( E_OK == ercd, "sta_tsk bad ercd" );
226 
 
227 
    // drop pri of task 2
228 
    ercd = chg_pri( 2, 4 );
229 
    CYG_TEST_CHECK( E_OK == ercd, "chg_pri bad ercd" );
230 
    ercd = ref_tsk( &ref_tskd, 2 );
231 
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
232 
    CYG_TEST_CHECK( TTS_RDY == ref_tskd.tskstat, "Bad task status 2" );
233 
    CYG_TEST_CHECK( 4 == ref_tskd.tskpri, "Bad task prio 2" );
234 
 
235 
    // drop our pri below task 2
236 
    ercd = chg_pri( 0, 5 );
237 
    CYG_TEST_CHECK( E_OK == ercd, "chg_pri bad ercd" );
238 
 
239 
    ercd = ref_tsk( &ref_tskd, 1 );
240 
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
241 
    CYG_TEST_CHECK( 5 == ref_tskd.tskpri, "Bad task prio 1" );
242 
    ercd = ref_tsk( &ref_tskd, 0 );
243 
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
244 
    CYG_TEST_CHECK( 5 == ref_tskd.tskpri, "Bad task prio 0" );
245 
    ercd = ref_tsk( &ref_tskd, 2 );
246 
    CYG_TEST_CHECK( E_OK == ercd, "ref_tsk bad ercd" );
247 
    // it will have run to completion and regained its original prio
248 
    CYG_TEST_CHECK( 2 == ref_tskd.tskpri, "Bad task prio 2" );
249 
    CYG_TEST_CHECK( TTS_DMT == ref_tskd.tskstat, "Bad task status 2" );
250 
 
251 
    // retest these now that the task has executed once
252 
    ercd = rsm_tsk( 2 );
253 
    CYG_TEST_CHECK( E_OBJ == ercd, "rsm_tsk DMT bad ercd !E_OBJ" );
254 
    ercd = frsm_tsk( 2 );
255 
    CYG_TEST_CHECK( E_OBJ == ercd, "frsm_tsk DMT bad ercd !E_OBJ" );
256 
    ercd = rel_wai( 2 );
257 
    CYG_TEST_CHECK( E_OBJ == ercd, "rel_wai DMT bad ercd !E_OBJ" );
258 
    ercd = sus_tsk( 2 );
259 
    CYG_TEST_CHECK( E_OBJ == ercd, "sus_tsk DMT bad ercd !E_OBJ" );
260 
    ercd = wup_tsk( 2 );
261 
    CYG_TEST_CHECK( E_OBJ == ercd, "wup_tsk DMT bad ercd !E_OBJ" );
262 
    ercd = can_wup( &scratch, 2 );
263 
    CYG_TEST_CHECK( E_OBJ == ercd, "can_wup DMT bad ercd !E_OBJ" );
264 
 
265 
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
266 
    ercd = chg_pri( -6, 9 );
267 
    CYG_TEST_CHECK( E_ID == ercd, "chg_pri bad ercd !E_ID" );
268 
    ercd = chg_pri( 99, 9 );
269 
    CYG_TEST_CHECK( E_ID == ercd, "chg_pri bad ercd !E_ID" );
270 
    ercd = sta_tsk( -6, 99 );
271 
    CYG_TEST_CHECK( E_ID == ercd, "sta_tsk bad ercd !E_ID" );
272 
    ercd = sta_tsk( 99, 99 );
273 
    CYG_TEST_CHECK( E_ID == ercd, "sta_tsk bad ercd !E_ID" );
274 
#endif // we can test bad param error returns
275 
 
276 
    CYG_TEST_PASS( "sta_tsk, chg_pri" );
277 
 
278 
    CYG_TEST_INFO( "Testing delay and dispatch disabling" );
279 
    ercd = dly_tsk( 10 );
280 
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
281 
    ercd = ena_dsp();
282 
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );
283 
    ercd = dly_tsk( 10 );
284 
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
285 
    ercd = dis_dsp();
286 
    CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" );
287 
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
288 
    ercd = dly_tsk( 10 );
289 
    CYG_TEST_CHECK( E_CTX == ercd, "dly_tsk bad ercd !E_CTX" );
290 
    ercd = dis_dsp();
291 
    CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" );
292 
    ercd = dly_tsk( 10 );
293 
    CYG_TEST_CHECK( E_CTX == ercd, "dly_tsk bad ercd !E_CTX" );
294 
#endif // we can test bad param error returns
295 
    ercd = ena_dsp();
296 
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );
297 
    ercd = dly_tsk( 10 );
298 
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
299 
    ercd = ena_dsp();
300 
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );
301 
    ercd = dly_tsk( 10 );
302 
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
303 
 
304 
    CYG_TEST_PASS( "dly_tsk, ena_dsp, dis_dsp" );
305 
 
306 
    CYG_TEST_INFO( "Testing ready queue manipulation" );
307 
    ercd = rot_rdq( 0 );
308 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
309 
    ercd = rot_rdq( 4 );
310 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
311 
    ercd = rot_rdq( 5 );
312 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
313 
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
314 
    ercd = rot_rdq( -6 );
315 
    CYG_TEST_CHECK( E_PAR == ercd, "rot_rdq bad ercd !E_PAR" );
316 
    ercd = rot_rdq( 99 );
317 
    CYG_TEST_CHECK( E_PAR == ercd, "rot_rdq bad ercd !E_PAR" );
318 
#endif // we can test bad param error returns
319 
 
320 
    CYG_TEST_PASS( "rot_rdq" );
321 
 
322 
    CYG_TEST_INFO( "Testing suspend/resume" );
323 
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
324 
    ercd = sus_tsk( -6 );
325 
    CYG_TEST_CHECK( E_ID == ercd, "sus_tsk bad ercd !E_ID" );
326 
    ercd = sus_tsk( 99 );
327 
    CYG_TEST_CHECK( E_ID == ercd, "sus_tsk bad ercd !E_ID" );
328 
    ercd = rsm_tsk( -6 );
329 
    CYG_TEST_CHECK( E_ID == ercd, "rsm_tsk bad ercd !E_ID" );
330 
    ercd = rsm_tsk( 99 );
331 
    CYG_TEST_CHECK( E_ID == ercd, "rsm_tsk bad ercd !E_ID" );
332 
    ercd = frsm_tsk( -6 );
333 
    CYG_TEST_CHECK( E_ID == ercd, "frsm_tsk bad ercd !E_ID" );
334 
    ercd = frsm_tsk( 99 );
335 
    CYG_TEST_CHECK( E_ID == ercd, "frsm_tsk bad ercd !E_ID" );
336 
#endif // we can test bad param error returns
337 
    // drop task 3 pri to same as us
338 
    CYG_TEST_CHECK( 0 == intercount, "intercount != 0" );
339 
 
340 
    intercom = 3;                       // tell T3 to loop
341 
    TSRELEASE();
342 
    ercd = dis_dsp();
343 
    CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" );
344 
    ercd = sta_tsk( 3, 66 );
345 
    CYG_TEST_CHECK( E_OK == ercd, "sta_tsk bad ercd" );
346 
    ercd = chg_pri( 3, 5 );
347 
    CYG_TEST_CHECK( E_OK == ercd, "chg_pri bad ercd" );
348 
    ercd = ena_dsp();
349 
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );
350 
 
351 
    ercd = rot_rdq( 0 );
352 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
353 
    ICWAIT( 1 );
354 
    CYG_TEST_CHECK( 1 == intercount, "intercount != 1" );
355 
    ercd = sus_tsk( 3 );
356 
    TSRELEASE();
357 
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
358 
    intercom = 0;                       // bad data to T3
359 
    ercd = rot_rdq( 0 );
360 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
361 
    CYG_TEST_CHECK( 1 == intercount, "intercount != 1" );
362 
    intercom = 3;                       // tell T3 to loop
363 
    TSRELEASE();
364 
    ercd = rsm_tsk( 3 );
365 
    CYG_TEST_CHECK( E_OK == ercd, "rsm_tsk bad ercd" );
366 
    ercd = rot_rdq( 0 );
367 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
368 
    ICWAIT( 2 );
369 
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );
370 
 
371 
    CYG_TEST_INFO( "Command task 3 inner loop stop" );
372 
    intercom = 2 + 4;
373 
    TSRELEASE();
374 
    ercd = rot_rdq( 0 );
375 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
376 
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );
377 
 
378 
    ercd = sus_tsk( 3 );
379 
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
380 
    intercom = 0;                       // bad data to T3
381 
    TSRELEASE();
382 
    ercd = rot_rdq( 0 );
383 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
384 
    ercd = sus_tsk( 3 );                // suspend AGAIN
385 
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
386 
    ercd = sus_tsk( 3 );                //     AND AGAIN
387 
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
388 
    TSRELEASE();
389 
    ercd = rot_rdq( 0 );
390 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
391 
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );
392 
    ercd = rsm_tsk( 3 );
393 
    CYG_TEST_CHECK( E_OK == ercd, "rsm_tsk bad ercd" );
394 
    ercd = rsm_tsk( 3 );
395 
    CYG_TEST_CHECK( E_OK == ercd, "rsm_tsk bad ercd" );
396 
    TSRELEASE();
397 
    ercd = rot_rdq( 0 );
398 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
399 
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );
400 
    intercom = 3;                       // tell T3 to loop
401 
    TSRELEASE();
402 
    ercd = rsm_tsk( 3 );                // expect restart this time
403 
    CYG_TEST_CHECK( E_OK == ercd, "rsm_tsk bad ercd" );
404 
    ercd = rot_rdq( 0 );
405 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
406 
    ICWAIT( 3 );
407 
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
408 
 
409 
    CYG_TEST_INFO( "Command task 3 inner loop stop 2" );
410 
    intercom = 2 + 4;
411 
    TSRELEASE();
412 
    ercd = rot_rdq( 0 );
413 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
414 
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
415 
 
416 
    ercd = sus_tsk( 3 );
417 
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
418 
    intercom = 0;                       // bad data to T3
419 
    TSRELEASE();
420 
    ercd = rot_rdq( 0 );
421 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
422 
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
423 
    ercd = sus_tsk( 3 );                // suspend AGAIN
424 
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
425 
    ercd = sus_tsk( 3 );                //     AND AGAIN
426 
    CYG_TEST_CHECK( E_OK == ercd, "sus_tsk bad ercd" );
427 
    TSRELEASE();
428 
    ercd = rot_rdq( 0 );
429 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
430 
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
431 
    intercom = 3;                       // tell T3 to loop
432 
    TSRELEASE();
433 
    ercd = frsm_tsk( 3 );               // expect restart this time
434 
    CYG_TEST_CHECK( E_OK == ercd, "frsm_tsk bad ercd" );
435 
    ercd = rot_rdq( 0 );
436 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
437 
    ICWAIT( 4 );
438 
    CYG_TEST_CHECK( 4 == intercount, "intercount != 4" );
439 
 
440 
    TSRELEASE();
441 
    ercd = rsm_tsk( 3 );               // try it again
442 
    CYG_TEST_CHECK( E_OBJ == ercd, "rsm_tsk bad ercd !E_OBJ" );
443 
    ercd = rot_rdq( 0 );
444 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
445 
    ICWAIT( 5 );
446 
    CYG_TEST_CHECK( 5 == intercount, "intercount != 5" );
447 
 
448 
    TSRELEASE();
449 
    ercd = frsm_tsk( 3 );               // try it again
450 
    CYG_TEST_CHECK( E_OBJ == ercd, "frsm_tsk bad ercd !E_OBJ" );
451 
    ercd = rot_rdq( 0 );
452 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
453 
    ICWAIT( 6 );
454 
    CYG_TEST_CHECK( 6 == intercount, "intercount != 6" );
455 
 
456 
    CYG_TEST_INFO( "Command task 3 all loops stop" );
457 
    intercom = 4 + 8;
458 
    TSRELEASE();
459 
    ercd = rot_rdq( 0 );
460 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
461 
    TSRELEASE();
462 
    ercd = rot_rdq( 0 );
463 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
464 
    CYG_TEST_CHECK( 6 == intercount, "intercount != 6" );
465 
 
466 
    intercom = intercount = 0;
467 
 
468 
    CYG_TEST_PASS( "sus_tsk, rsm_tsk, frsm_tsk" );
469 
 
470 
    CYG_TEST_INFO( "Testing sleep/wakeup stuff" );
471 
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
472 
    ercd = wup_tsk( -6 );
473 
    CYG_TEST_CHECK( E_ID == ercd, "wup_tsk bad ercd !E_ID" );
474 
    ercd = wup_tsk( 99 );
475 
    CYG_TEST_CHECK( E_ID == ercd, "wup_tsk bad ercd !E_ID" );
476 
    ercd = can_wup( &scratch, -6 );
477 
    CYG_TEST_CHECK( E_ID == ercd, "can_wup bad ercd !E_ID" );
478 
    ercd = can_wup( &scratch, 99 );
479 
    CYG_TEST_CHECK( E_ID == ercd, "can_wup bad ercd !E_ID" );
480 
#ifndef CYGSEM_UITRON_PARAMS_NULL_IS_GOOD_PTR
481 
    ercd = can_wup( NULL, 2 );
482 
    CYG_TEST_CHECK( E_PAR == ercd, "can_wup bad ercd !E_PAR" );
483 
#endif
484 
 
485 
    ercd = wup_tsk( 0 );                // not ourself
486 
    CYG_TEST_CHECK( E_ID == ercd, "wup_tsk bad ercd !E_ID" );
487 
    ercd = wup_tsk( 1 );                // ourself
488 
    CYG_TEST_CHECK( E_OBJ == ercd, "wup_tsk bad ercd !E_OBJ" );
489 
#endif // we can test bad param error returns
490 
 
491 
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
492 
    ercd = tslp_tsk( -6 );
493 
    CYG_TEST_CHECK( E_PAR == ercd, "tslp_tsk bad ercd !E_PAR" );
494 
#endif // we can test bad param error returns
495 
    ercd = tslp_tsk( TMO_POL );
496 
    CYG_TEST_CHECK( E_TMOUT == ercd, "tslp_tsk bad ercd !E_TMOUT" );
497 
    ercd = tslp_tsk( 5 );
498 
    CYG_TEST_CHECK( E_TMOUT == ercd, "tslp_tsk bad ercd !E_TMOUT" );
499 
#ifdef CYGSEM_UITRON_BAD_PARAMS_RETURN_ERRORS
500 
    ercd = dis_dsp();
501 
    CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" );
502 
    ercd = tslp_tsk( TMO_FEVR );
503 
    CYG_TEST_CHECK( E_CTX == ercd, "tslp_tsk bad ercd !E_CTX" );
504 
     ercd = tslp_tsk( TMO_POL );
505 
    CYG_TEST_CHECK( E_CTX == ercd, "tslp_tsk bad ercd !E_CTX" );
506 
    ercd = tslp_tsk( 5 );
507 
    CYG_TEST_CHECK( E_CTX == ercd, "tslp_tsk bad ercd !E_CTX" );
508 
    ercd = ena_dsp();
509 
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );
510 
    ercd = tslp_tsk( -6 );
511 
    CYG_TEST_CHECK( E_PAR == ercd, "tslp_tsk bad ercd !E_PAR" );
512 
#endif // we can test bad param error returns
513 
    ercd = tslp_tsk( TMO_POL );
514 
    CYG_TEST_CHECK( E_TMOUT == ercd, "tslp_tsk bad ercd !E_TMOUT" );
515 
    ercd = tslp_tsk( 5 );
516 
    CYG_TEST_CHECK( E_TMOUT == ercd, "tslp_tsk bad ercd !E_TMOUT" );
517 
 
518 
    // drop task 4 pri to same as us
519 
    intercount = 0;
520 
    intercom = 1;                       // test plain slp_tsk
521 
    TSRELEASE();
522 
    ercd = chg_pri( 4, 5 );
523 
    CYG_TEST_CHECK( E_OBJ == ercd, "chg_pri bad ercd" );
524 
 
525 
    ercd = dis_dsp();
526 
    CYG_TEST_CHECK( E_OK == ercd, "dis_dsp bad ercd" );
527 
    ercd = sta_tsk( 4, 77 );
528 
    CYG_TEST_CHECK( E_OK == ercd, "sta_tsk bad ercd" );
529 
    ercd = chg_pri( 4, 5 );
530 
    CYG_TEST_CHECK( E_OK == ercd, "chg_pri bad ercd" );
531 
    ercd = ena_dsp();
532 
    CYG_TEST_CHECK( E_OK == ercd, "ena_dsp bad ercd" );
533 
 
534 
    ercd = wup_tsk( 4 );
535 
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
536 
    ercd = rot_rdq( 0 );
537 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
538 
    ICWAIT( 1 );
539 
    CYG_TEST_CHECK( 1 == intercount, "intercount != 1" );
540 
    intercom = 2;                       // test tslp_tsk
541 
    TSRELEASE();
542 
    ercd = wup_tsk( 4 );
543 
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
544 
    ercd = rot_rdq( 0 );
545 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
546 
    ICWAIT( 2 );
547 
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );
548 
    intercom = 3;                       // test tslp_tsk
549 
    TSRELEASE();
550 
    ercd = rot_rdq( 0 );
551 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
552 
    CYG_TEST_CHECK( 2 == intercount, "intercount != 2" );
553 
    intercom = 1;                       // test slp_tsk next...
554 
    ercd = dly_tsk( 20 );               // without a wup
555 
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
556 
    ICWAIT( 3 );
557 
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
558 
 
559 
    intercom = 1;                       // ...test slp_tsk
560 
    TSRELEASE();
561 
    ercd = dly_tsk( 20 );               // without a wup (yet)
562 
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
563 
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
564 
    TSRELEASE();
565 
    ercd = tslp_tsk( 20 );              // yield again
566 
    CYG_TEST_CHECK( E_TMOUT == ercd, "tslp_tsk bad ercd !E_TMOUT" );
567 
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
568 
    TSRELEASE();
569 
    ercd = rot_rdq( 0 );                // and again
570 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
571 
    CYG_TEST_CHECK( 3 == intercount, "intercount != 3" );
572 
    TSRELEASE();
573 
    ercd = wup_tsk( 4 );                // now issue a wup
574 
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
575 
    ercd = rot_rdq( 0 );                // and yield
576 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
577 
    ICWAIT( 4 );
578 
    CYG_TEST_CHECK( 4 == intercount, "intercount != 4" );
579 
 
580 
    intercom = 1;                       // test slp_tsk
581 
    TSRELEASE();
582 
    ercd = dly_tsk( 20 );               // without a wup (yet)
583 
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
584 
    CYG_TEST_CHECK( 4 == intercount, "intercount != 4" );
585 
 
586 
    // this wup will restart it when we yield:
587 
    TSLOCK();
588 
    ercd = wup_tsk( 4 );                // now issue a wup
589 
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
590 
    // these will count up:
591 
    ercd = wup_tsk( 4 );                // now issue a wup
592 
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
593 
    ercd = wup_tsk( 4 );                // now issue a wup
594 
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
595 
    scratch = -1;
596 
    ercd = can_wup( &scratch, 4 );
597 
    CYG_TEST_CHECK( E_OK == ercd, "can_wup bad ercd" );
598 
    CYG_TEST_CHECK( 2 == scratch, "Cancelled wups not 2" );
599 
    CYG_TEST_CHECK( 4 == intercount, "intercount != 4" );
600 
    TSUNLOCK();
601 
 
602 
    intercom = 4;                       // do nothing
603 
    TSRELEASE();
604 
    ercd = rot_rdq( 0 );                // and yield
605 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
606 
    ICWAIT( 5 );
607 
    CYG_TEST_CHECK( 5 == intercount, "intercount != 5" );
608 
    TSRELEASE();
609 
    ercd = dly_tsk( 20 );               // let it do nothing
610 
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
611 
 
612 
    TSRELEASE();
613 
    ercd = wup_tsk( 4 );                // now issue a wup
614 
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
615 
    TSRELEASE();
616 
    ercd = wup_tsk( 4 );                // now issue a wup
617 
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
618 
    TSRELEASE();
619 
    ercd = wup_tsk( 4 );                // now issue a wup
620 
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
621 
    TSRELEASE();
622 
    ercd = dly_tsk( 20 );               // lots of wups but no sleep
623 
    CYG_TEST_CHECK( E_OK == ercd, "dly_tsk bad ercd" );
624 
    CYG_TEST_CHECK( 5 == intercount, "intercount != 5" );
625 
    scratch = -1;
626 
    ercd = can_wup( &scratch, 4 );
627 
    CYG_TEST_CHECK( E_OK == ercd, "can_wup bad ercd" );
628 
    CYG_TEST_CHECK( 3 == scratch, "Cancelled wups not 3" );
629 
    // now check that they are cancelled by doing a wait again
630 
    intercom = 1;                       // test slp_tsk
631 
    TSRELEASE();
632 
    ercd = rot_rdq( 0 );                // still without a wup
633 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
634 
    TSRELEASE();
635 
    ercd = rot_rdq( 0 );                // still without a wup
636 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
637 
    intercom = 4;                       // do nothing next
638 
    TSRELEASE();
639 
    ICWAIT( 6 );
640 
    CYG_TEST_CHECK( 6 == intercount, "intercount != 6" );
641 
    ercd = rot_rdq( 0 );                // still without a wup
642 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
643 
    CYG_TEST_CHECK( 6 == intercount, "intercount != 6" );
644 
    TSRELEASE();
645 
    ercd = wup_tsk( 4 );                // now issue a wup
646 
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
647 
    ercd = rot_rdq( 0 );                // it will run now
648 
    CYG_TEST_CHECK( E_OK == ercd, "wup_tsk bad ercd" );
649 
    TSRELEASE();
650 
    ercd = rot_rdq( 0 );                // it will run now
651 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
652 
    ICWAIT( 7 );
653 
    CYG_TEST_CHECK( 7 == intercount, "intercount != 7" );
654 
 
655 
    TSRELEASE();
656 
    intercom = 99;                      // exit, all done
657 
    ercd = rot_rdq( 0 );                // let it run
658 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
659 
    ICWAIT( 8 );
660 
    CYG_TEST_CHECK( 8 == intercount, "intercount != 8" );
661 
 
662 
    TSRELEASE();
663 
    ercd = rot_rdq( 0 );                // let it run
664 
    CYG_TEST_CHECK( E_OK == ercd, "rot_rdq bad ercd" );
665 
    CYG_TEST_CHECK( 8 == intercount, "intercount != 8" );
666 
 
667 
    CYG_TEST_PASS( "wup_tsk, can_wup, slp_tsk, tslp_tsk" );
668 
 
669 
#ifdef CYG_TEST_UITRON_TEST1_LOOPING
670 
    chg_pri( 1, 1 );
671 
    rot_rdq( 0 );
672 
    ter_tsk( 2 );
673 
    rot_rdq( 0 );
674 
    ter_tsk( 3 );
675 
    rot_rdq( 0 );
676 
    ter_tsk( 4 );
677 
    rot_rdq( 0 );
678 
    }
679 
#endif // CYG_TEST_UITRON_TEST1_LOOPING
680 
 
681 
    CYG_TEST_EXIT( "All done" );
682 
    ext_tsk();
683 
}
684 
 
685 
 
686 
 
687 
void task2( unsigned int arg )
688 
{
689 
    ER ercd;
690 
    CYG_TEST_PASS( "Task 2 running" );
691 
    ercd = get_tid( &scratch );
692 
    CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
693 
    CYG_TEST_CHECK( 2 == scratch, "tid not 2" );
694 
    if ( 99 != arg )
695 
        CYG_TEST_FAIL( "Task 2 arg not 99" );
696 
    ext_tsk();
697 
    CYG_TEST_FAIL( "Task 2 failed to exit" );
698 
}
699 
 
700 
void task3( unsigned int arg )
701 
{
702 
    ER ercd;
703 
    TSLOCK();
704 
    CYG_TEST_PASS("Task3 running");
705 
    ercd = get_tid( &scratch );
706 
    CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
707 
    CYG_TEST_CHECK( 3 == scratch, "tid not 3" );
708 
    if ( 66 != arg )
709 
        CYG_TEST_FAIL( "Task 3 arg not 66" );
710 
 
711 
    while ( 2 & intercom ) {
712 
        while ( 1 & intercom ) {
713 
            intercount++;
714 
            TSSTOP();
715 
            do {
716 
                TSUNLOCK();
717 
                ercd = rot_rdq( 0 );        // yield()
718 
                TSLOCK();
719 
                CYG_TEST_CHECK( E_OK == ercd, "rot_rdq 1 (task3) bad ercd" );
720 
            } while ( !TSGO() );
721 
        }
722 
        CYG_TEST_CHECK( 4 & intercom, "should not have got here yet 1" );
723 
        TSSTOP();
724 
        do {
725 
            TSUNLOCK();
726 
            ercd = rot_rdq( 0 );            // yield()
727 
            TSLOCK();
728 
            CYG_TEST_CHECK( E_OK == ercd, "rot_rdq 2 (task3) bad ercd" );
729 
        } while ( !TSGO() );
730 
    }
731 
    CYG_TEST_CHECK( 8 & intercom, "should not have got here yet 2" );
732 
 
733 
    TSUNLOCK();
734 
    ext_tsk();
735 
    CYG_TEST_FAIL( "Task 3 failed to exit" );
736 
}
737 
 
738 
void task4( unsigned int arg )
739 
{
740 
    ER ercd;
741 
    CYG_TEST_PASS("Task4 running");
742 
    ercd = get_tid( &scratch );
743 
    CYG_TEST_CHECK( E_OK == ercd, "get_tid bad ercd" );
744 
    CYG_TEST_CHECK( 4 == scratch, "tid not 4" );
745 
    if ( 77 != arg )
746 
        CYG_TEST_FAIL( "Task 4 arg not 77" );
747 
    while ( 1 ) {
748 
        switch ( intercom ) {
749 
        case 1:
750 
            ercd = slp_tsk();
751 
            CYG_TEST_CHECK( E_OK == ercd, "slp_tsk (task4) bad ercd" );
752 
            break;
753 
        case 2:
754 
            ercd = tslp_tsk( 10 );
755 
            CYG_TEST_CHECK( E_OK == ercd, "slp_tsk (task4) bad ercd" );
756 
            break;
757 
        case 3:
758 
            ercd = tslp_tsk( 10 );
759 
            CYG_TEST_CHECK( E_TMOUT == ercd,
760 
                            "slp_tsk (task4) bad ercd !E_TMOUT" );
761 
            break;
762 
        case 4:
763 
            // busily do nothing
764 
            while ( 4 == intercom ) {
765 
                ercd = rot_rdq( 0 );
766 
                CYG_TEST_CHECK( E_OK == ercd,
767 
                                "rot_rdq (task4 idle) bad ercd" );
768 
            }
769 
            break;
770 
        case 99:
771 
            goto out;
772 
        default:
773 
            CYG_TEST_FAIL( "Task 4 bad intercom" );
774 
            goto out;
775 
        }
776 
        intercount++;
777 
        TSSTOP();
778 
        do {
779 
            ercd = rot_rdq( 0 );            // yield()
780 
            CYG_TEST_CHECK( E_OK == ercd, "rot_rdq (task4) bad ercd" );
781 
        } while ( !TSGO() );
782 
    }
783 
out:
784 
    ext_tsk();
785 
    CYG_TEST_FAIL( "Task 4 failed to exit" );
786 
}
787 
 
788 
#else // not enough (or too many) uITRON objects configured in
789 
#define N_A_MSG "not enough uITRON objects to run test"
790 
#endif // not enough (or too many) uITRON objects configured in
791 
#else  // not C++ and some C++ specific options enabled
792 
#define N_A_MSG "C++ specific options selected but this is C"
793 
#endif  // not C++ and some C++ specific options enabled
794 
#else // ! CYGVAR_KERNEL_COUNTERS_CLOCK   - can't test without it
795 
#define N_A_MSG "no CYGVAR_KERNEL_COUNTERS_CLOCK"
796 
#endif // ! CYGVAR_KERNEL_COUNTERS_CLOCK  - can't test without it
797 
#else  // ! CYGFUN_KERNEL_THREADS_TIMER   - can't test without it
798 
#define N_A_MSG "no CYGFUN_KERNEL_THREADS_TIMER"
799 
#endif // ! CYGFUN_KERNEL_THREADS_TIMER   - can't test without it
800 
#else  // ! CYGIMP_THREAD_PRIORITY        - can't test without it
801 
#define N_A_MSG "no CYGSEM_KERNEL_SCHED_MLQUEUE"
802 
#endif // ! CYGSEM_KERNEL_SCHED_MLQUEUE   - can't test without it
803 
#else  // ! CYGPKG_UITRON
804 
#define N_A_MSG "uITRON Compatibility layer disabled"
805 
#endif // CYGPKG_UITRON
806 
 
807 
#ifdef N_A_MSG
808 
externC void
809 
cyg_start( void )
810 
{
811 
    CYG_TEST_INIT();
812 
    CYG_TEST_NA( N_A_MSG );
813 
}
814 
#endif // N_A_MSG defined ie. we are N/A.
815 
 
816 
// EOF testcxx.cxx

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.